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参数资料
| 型号： | W948D2FBJX5I |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 4M X 32 DDR DRAM, 5 ns, PBGA90 |
| 封装： | 8 X 13 MM, 0.80 MM PITCH, HALOGEN FREE AND LEAD FREE, VFBGA-90 |
| 文件页数： | 8/60页 |
| 文件大小： | 1147K |
| 代理商： | W948D2FBJX5I |
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W948D6FB / W948D2FB
256Mb Mobile LPDDR
Publication Release Date : May, 24, 2011
- 16 -
Revision A01-003
6.6.1 Extended Mode Register Definition
Extended Mode Reg.
Address Bus
A0
A1
A2
A3
A4
A5
A7 ~
An....A8 (1)
BA0
BA1
1
0
0 ( 2)
DS
Reserved
PASR
A6
A5
Drive Strength
0
1
0
Full Strength Driver
Half Strength Drive
Quarter Strength Driver
A2
A1
A0
PASR
0
1
All banks
1/2 array (BA1=0)
1/4 array (BA1=BA0=0)
Reserved
NOTES:
1.MSB depends on mobile DDR SDRAM density.
2.A logic 0 should be programmed to all unused / undefined bits to ensure future compatibility.
Octant Strength Driver
A7
0
1
0
Three-Quarters Strength Driver
6.7 Status Register Read
Status Register Read (SRR) is an optional feature in JEDEC, and it is implemented in this device. With SRR, a
method is defined to read registers from the device. The encoding for an SRR command is the same as a MRS with
BA[1:0]=”01”. The address pins (A[n:0]) encode which register is to be read. Currently only one register is defined at
A[n:0]=0. The sequence to perform an SRR command is as follows:
All reads/writes must be completed
All banks must be closed
MRS with BA=01 is issued (SRR)
Wait tSRR
Read issued to any bank/page
CAS latency cycles later the device returns the registers data as it would a normal read
The next command to the device can be issued tSRC after the Read command was issued.
The burst length for the SRR read is always fixed to length 2.
相关PDF资料 |
PDF描述 |
|---|---|
| W949D6CBHX6G | 32M X 16 DDR DRAM, 5 ns, PBGA60 |
| W949D2CBJX5I | 16M X 32 DDR DRAM, 5 ns, PBGA90 |
| W949D6CBHX6E | 32M X 16 DDR DRAM, 5 ns, PBGA60 |
| W949D2CBJX6G | 16M X 32 DDR DRAM, 5 ns, PBGA90 |
| W963B6BBN80E | 512K X 16 PSEUDO STATIC RAM, 75 ns, PBGA48 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W948D2FBJX5I TR | 制造商:Winbond Electronics Corp 功能描述:256M MDDR, X32, 200MHZ, INDUST |
| W948D2FBJX6E | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR SDRAM 256M-Bit 8Mx32 1.8V 90-Pin VFBGA 制造商:Winbond Electronics 功能描述:LOW POWER DRAM 制造商:Winbond Electronics Corp 功能描述:IC MEMORY |
| W948D2FBJX6ETR | 制造商:Winbond Electronics Corp 功能描述:256M MDDR, X32, 166MHZ, 65NM |
| W948D2FBJX6G | 制造商:WINBOND 制造商全称:Winbond 功能描述:256Mb Mobile LPDDR |
| W948D6FB | 制造商:WINBOND 制造商全称:Winbond 功能描述:256Mb Mobile LPDDR |
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