- 您现在的位置：买卖IC网 > PDF目录68560 > W9825G2DB-6 (WINBOND ELECTRONICS CORP) 8M X 32 SYNCHRONOUS DRAM, 5 ns, PBGA90 PDF资料下载
参数资料
| 型号： | W9825G2DB-6 |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 8M X 32 SYNCHRONOUS DRAM, 5 ns, PBGA90 |
| 封装： | 8 X 13 MM, 0.80 MM PITCH, ROHS COMPLIANT, TFBGA-90 |
| 文件页数： | 4/42页 |
| 文件大小： | 916K |
| 代理商： | W9825G2DB-6 |
第1页第2页第3页当前第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页
W9825G2DB
Publication Release Date:Jun. 24, 2009
- 12 -
Revision A8
8. OPERATION MODE
Fully synchronous operations are performed to latch the commands at the positive edges of CLK.
Table 1 shows the truth table for the operation commands.
Table 1 Truth Table (Note (1), (2))
COMMAND
DEVICE
STATE
CKEn-1 CKEn
DQM
BS0, 1
A10
A0
A9
A11
CS
RAS
CAS
WE
Bank Active
Idle
H
x
v
L
H
Bank Precharge
Any
H
x
v
L
x
L
H
L
Precharge All
Any
H
x
H
x
L
H
L
Write
Active
(3)
H
x
v
L
v
L
H
L
Write with Auto-
precharge
Active
(3)
H
x
v
H
v
L
H
L
Read
Active
(3)
H
x
v
L
v
L
H
L
H
Read with Auto-
precharge
Active
(3)
H
x
v
H
v
L
H
L
H
Mode Register Set
Idle
H
x
v
L
No – Operation
Any
H
x
L
H
Burst Stop
Active
(4)
H
x
L
H
L
Device Deselect
Any
H
x
H
x
Auto- Refresh
Idle
H
x
L
H
Self- Refresh Entry
Idle
H
L
x
L
H
Self Refresh Exit
idle
(S.R.)
L
H
x
H
L
x
H
x
H
x
Clock suspend Mode
Entry
Active
H
L
x
Power-down Mode
Entry
Idle
Active
(5)
H
L
x
H
L
x
H
x
H
x
Clock Suspend Mode
Exit
Active
L
H
x
Power-down Mode
Exit
Any
(Power
L
H
x
H
L
x
H
x
H
x
Data write/Output
Enable
Active
H
x
L
x
Data Write/Output
Disable
Active
H
x
H
x
Notes:
(1) v = valid
x = Don’t care
L = Low Level H = High Level
(2) CKEn signal is input level when commands are provided.
CKEn-1 signal is the input level one clock cycle before the command is issued.
(3) These are state of bank designated by BS0, BS1 signals.
(4) Device state is full page burst operation.
(5) Power-down Mode can not be entered in the burst cycle.
When this command asserts in the burst cycle, device state is clock suspend mode.
相关PDF资料 |
PDF描述 |
|---|---|
| W9825G6JH-6 | 16M X 16 SYNCHRONOUS DRAM, 5 ns, PDSO54 |
| W9825G6JH-5 | 16M X 16 SYNCHRONOUS DRAM, 5 ns, PDSO54 |
| W986416DH-6 | 4M X 16 SYNCHRONOUS DRAM, 5 ns, PDSO54 |
| W986416EH-6 | 4M X 16 SYNCHRONOUS DRAM, 5 ns, PDSO54 |
| W986432EH-5 | 2M X 32 SYNCHRONOUS DRAM, 4.5 ns, PDSO86 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W9825G2JB | 制造商:WINBOND 制造商全称:Winbond 功能描述:2M ? 4 BANKS ? 32BITS SDRAM |
| W9825G2JB-6 | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip SDRAM 256M-Bit 8Mx32 3.3V 90-Pin TFBGA 制造商:Winbond Electronics Corp 功能描述:IC SDRAM 256MBIT 166MHZ 制造商:Winbond Electronics Corp 功能描述:IC SDRAM 256MBIT 166MHZ 90TFBGA |
| W9825G2JB-6I | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip SDRAM 256M-Bit 8Mx32 3.3V 90-Pin TFBGA 制造商:Winbond Electronics Corp 功能描述:IC SDRAM 256MBIT 166MHZ 90TFBGA |
| W9825G2JB-75 | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip SDRAM 256M-Bit 8Mx32 3.3V 90-Pin TFBGA 制造商:Winbond Electronics Corp 功能描述:IC SDRAM 256MBIT 133MHZ 90TFBGA |
| W9825G6CH-75 | 制造商:Winbond Electronics Corp 功能描述:16*16bit SDRAM |
发布紧急采购，3分钟左右您将得到回复。