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参数资料
| 型号： | W987X6CBN80 |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 8M X 16 SYNCHRONOUS DRAM, 6 ns, PBGA54 |
| 封装： | 8 X 9 MM, 1.20 MM HEIGHT, FBGA-54 |
| 文件页数： | 4/46页 |
| 文件大小： | 1634K |
| 代理商： | W987X6CBN80 |
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Preliminary W987X6CB
- 12 -
5.
Power Down Mode can not be entered in the burst cycle. When this command asserts in the burst cycle, device state is
clock suspend mode.
12. FUNCTIONAL DESCRIPTION
Power Up Sequence
The default power up state of the mode register is unspecified. The following power up and
initialization sequence need to be followed to guarantee the device being preconditioned to each user
specific needs.
During power up, all VDD and VDDQ pins must be ramp up simultaneously to the specified voltage
when the input signals are held in the "NOP" state. The power up voltage must not exceed VDD +0.3V
on any of the input pins or VDD supplies. After power up, an initial pause of 200
S is required followed
by a precharge of all banks using the precharge command. To prevent data contention on the DQ bus
during power up, it is required that the DQM and CKE pins be held high during the initial pause period.
Once all banks have been precharged, the Mode Register Set Command must be issued to initialize
the Mode Register. An additional eight Auto Refresh cycles (CBR) are also required before or after
programming the Mode Register to ensure proper subsequent operation.
Command Function
Bank Activate command
( RAS = "L", CAS = "H", WE = "H", BS0, BS1 = Bank, A0 to A11 = Row Address)
The Bank Activate command activates the bank designated by the BS (Bank select) signal. Row
addresses are latched on A0 to A11 when this command is issued and the cell data is read out of
the sense amplifiers. The maximum time that each bank can be held in the active state is
specified as tRAS (max). After this command is issued, Read or Write operation can be executed.
Bank Precharge command
( RAS = "L", CAS = "H", WE = "L", BS0, BS1 = Bank, A10= "L", A0 to A9, A11 = Don’t care)
The Bank Precharge command percharges the bank designated by BS. The precharged bank is
switched from the active state to the idle state.
Precharge All command
( RAS = "L", CAS = "H", WE = "L", BS0, BS1 = Don’t care, A10= "H", A0 to A9, A11 = Don’t care)
The Precharge All command precharges all banks simultaneously. Then all banks are switched to
the idle state.
Write command
( RAS = "H", CAS = "L", WE = "L", BS0, BS1 = Bank, A10 = "L", A0 to A8 = Column Address)
The write command performs a Write operation to the bank designated by BS. The write data are
latched at rising edge of CLK. The length of the write data (Burst Length) and column access
sequence (Addressing Mode) must be programmed in the Mode Register at power-up prior to the
Write operation.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W987Y6CBN | 制造商:未知厂家 制造商全称:未知厂家 功能描述:DRAM |
| W987Z6CBN | 制造商:未知厂家 制造商全称:未知厂家 功能描述:DRAM |
| W988D2FB | 制造商:WINBOND 制造商全称:Winbond 功能描述:256Mb Mobile LPSDR |
| W988D2FBJX6E | 制造商:Winbond Electronics Corp 功能描述:IC LPSDR SDRAM 256MBIT 90VFBGA |
| W988D2FBJX6I | 制造商:WINBOND 制造商全称:Winbond 功能描述:256Mb Mobile LPSDR |
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