
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
46
Datasheet
Document Number: 249241
Revision Number: 010
Revision Date: 30-May-2006
Table 14. LED Signal Descriptions – PQFP (Sheet 1 of 2)
Pin/Ball
Designation
Symbol
Type1
Signal Description2,3
PQFP
PBGA
82
81
80
K3,
K2,
J1
LED0_1_L
LED0_2_L
LED0_3_L
OD, TS, SL,
IP
Port 0 LED Drivers 1-3.
These pins drive LED indicators for Port 0. Each LED
can display one of several available status conditions
as selected by the LED Configuration Register (refer
77
76
75
J4,
J3,
H1
LED1_1_L
LED1_2_L
LED1_3_L
OD, TS, SL,
IP
Port 1 LED Drivers 1-3.
These pins drive LED indicators for Port 1. Each LED
can display one of several available status conditions
as selected by the LED Configuration Register (refer
73
72
71
H2,
H3,
G1
LED2_1_L
LED2_2_L
LED2_3_L
OD, TS, SL,
IP
Port 2 LED Drivers 1-3.
These pins drive LED indicators for Port 2. Each LED
can display one of several available status conditions
as selected by the LED Configuration Register (refer
70
69
68
F2,
G3,
G4
LED3_1_L
LED3_2_L
LED3_3_L
OD, TS, SL,
IP
Port 3 LED Drivers 1-3.
These pins drive LED indicators for Port 3. Each LED
can display one of several available status conditions
as selected by the LED Configuration Register (refer
180
181
182
K16,
K17,
J17
LED4_1_L
LED4_2_L
LED4_3_L
OD, TS, SL,
IP
Port 4 LED Drivers 1-3.
These pins drive LED indicators for Port 4. Each LED
can display one of several available status conditions
as selected by the LED Configuration Register (refer
1. Type Column Coding: I = Input, O = Output, OD = Open Drain output, ST = Schmitt Triggered input, TS =
Three-State-able output, SL = Slew-rate Limited output, IP = weak Internal Pull-up, ID = weak Internal pull-
Down.
2. The IP/ID resistors are disabled during H/W Power-Down mode. If a pin is an output or an I/O, the IP/ID
resistors are also disabled when the output is enabled.
3. The LED outputs are three-stated in H/W Power-Down mode and during H/W reset.