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Cortina Systems LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
4.3 Media Independent
Interface (MII) Interfaces
4.2.1.2
MDI Crossover (MDIX)
The LXT9785/LXT9785E crossover function, which is compliant to the IEEE 802.3, clause
23 standard, connects the transmit output of the device to the far-end receiver in a link
segment. This function can be disabled via Register bits 27.9:8 or by using the hardware
configuration pins.
Note:
The BGA15 package does not support MDIX hardware configuration. Software must be
used to control the function after power-up.
4.2.1.3
Fiber Interface
The LXT9785/LXT9785E fiber ports are designed to interface with common industry-
standard 3.3 V and 5 V fiber transceivers. Each of the 8 ports incorporates a Low-Voltage
PECL interface that complies with the ANSI X3.166 standard for seamless integration.
Note:
The BGA15 package does not support the fiber interface.
Fiber mode is selected through Register bit 16.0 by the following two methods:
1. Configure Register bit 16.0 = 1 on a global basis (all 8 ports) by driving the Hardware
Control pin G_FX/TP_L to a logic High value on power-up and/or reset.
2. Configure Register bit 16.0 = 1 on a per-port basis through the MDIO interface.
The fiber interface is capable of full-duplex or half-duplex operation. In half duplex,
operation collisions must be managed by external Layer 2 logic (MAC). Auto negotiation is
not supported for fiber mode.
4.3
Media Independent Interface (MII) Interfaces
The LXT9785/LXT9785E supports Reduced MII or Serial MII, but not concurrently. The
interface mode selection pins configures the device for either RMII or SMII/SS-SMII on all
eight ports. Refer to
Table 41 for the mode select settings.
Note:
The BGA15 package does not support the RMII interface.
Table 40
MDIX Selection
AMDIX_EN
MDIX
MDIX Mode
0
MDI forced
0
1
MDIX forced
1
X
Auto MDI/MDIX