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参数资料
| 型号： | X9470V24I |
| 厂商： | Intersil |
| 文件页数： | 10/24页 |
| 文件大小： | 0K |
| 描述： | IC BIAS CTRLR RF PA 24-TSSOP |
| 标准包装： | 62 |
| RF 型： | CDMA，GSM，EDGE |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP 裸露焊盘 |
X9470
DETAILED PIN DESCRIPTIONS
Supply Pins
Digital Supplies VCC, VSS
The positive power supply and ground for the DCP
digital control sections. VSS is normally tied to digital
ground. The X9470 is provided with separate digital
and analog power supply pins to better isolate digital
noise from the analog section.
Analog Supplies V+, AGND
The positive analog supply and ground for the Instru-
mentation Amplifier (IA). The analog supply ground is
kept separate to allow an external single point connec-
tion. V+ can be a separate supply voltage from VCC, or
VCC can be filtered before connection to V+.
Bias Adjustment Circuit Block Pins
RH BIAS , RL BIAS , and RW BIAS for VBIAS Adjust-
ments.
These pins are the connections to a Intersil Digitally
Controlled Potentiometer (XDCP?) or R BIAS potenti-
ometer. RH BIAS is connected to the most positive ref-
erence, and the RL BIAS is connected to the least
positive reference voltage. The potentiometer has a
resolution of 256-taps and typical R TOTAL of 10k ? . So
for example, to provide 4mV resolution, the voltage dif-
ference applied to the RH BIAS and RL BIAS pins must
be 1.024V. The RW BIAS value can be stored in non-
volatile memory and recalled upon power-up.
Serial Clock (SCL).
This is a dual function input pin. The state of the CS
pin determines the functionality.
Function 1: SCL is a negative edge-triggered control
pin of the R BIAS potentiometer. Toggling SCL will
either increment or decrement the wiper in the
direction indicated by the logic level on the INC/DEC
pin. CS must be high for this function.
Function 2: SCL is the serial bus clock for serial bus
interface. CS must be low for this function.
Chip Select (CS). Calibration Enable.
The CS input is the enable bias adjustments. When
the CS is HIGH (enabled) and a SCL pulse is present,
the wiper position on the R BIAS potentiometer will
automatically update with either an increment or dec-
rement of one tap position according to INC/DEC sig-
nal from the comparator.
10
When CS is LOW (disabled), the wiper counter of the
XDCP will hold the last wiper position until CS is
enabled again and the wiper position is updated.
INC/DEC Monitor Pin
The Up or Down Monitor pin (INC/DEC) indicates the
state of the comparator. This signal indicates that the
Instrumentation Amplifier output voltage is higher or
lower than the voltage level set by the RW REF pin. The
output is used to indicate the direction that the gate
bias voltage needs to move to reach the target bias
voltage.
Sense and Scale Block Pins
V SENSE+ and V SENSE-
These are the input pins to the IA circuit. These pins
are used to determine the change in voltage across
the the external drain sense resistor of an RF power
amplifier.
RH REF , RL REF , and RW REF . PA Bias Set Point.
The PA Bias reference voltage is controlled by a 64-
tap (10k ? typical R TOTAL ) potentiometer, called the
R REF potentiometer. The voltages applied to RH REF
and RL REF will determine the range of adjustment of
the reference voltage level (VREF) for the Compara-
tor. The resolution of the comparator reference is the
difference of the voltages applied to RH REF and RL REF
divided by 63. The position of the wiper (RW REF ) is
controlled via serial bus. The RW REF value can be
stored in non-volatile memory and recalled upon
power-up.
RW REF is also an input signal used as a scaling volt-
age (VREF) to set the appropriate I DQ of an RF power
amplifier. V REF can be derived from an external volt-
age divider or from a baseband processor or similar
microcontroller. V REF can be set permanently or
changed dynamically using the potentiometer for vari-
ous PA operating points.
V OUT
This pin is the output of the IA, which reflects a 20x or
50x gain of the input signal (voltage across the Vsense
pins). It can be used to indicate the magnitude of the
drain current envelope when RF is present.
FN8204.0
March 8, 2005
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