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参数资料
| 型号： | X9470V24I |
| 厂商： | Intersil |
| 文件页数： | 6/24页 |
| 文件大小： | 0K |
| 描述： | IC BIAS CTRLR RF PA 24-TSSOP |
| 标准包装： | 62 |
| RF 型： | CDMA，GSM，EDGE |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP 裸露焊盘 |
X9470
VBIAS OUTPUT VOLTAGE FOLLOWER
Recommended Operating Conditions: (Vcc, V+ = 4.75 to 5.25V; Vsense+, Vsense- = 26V; T A = -40°C to +85°C, unless
otherwise noted.)
Limits
Symbol
Parameter
Min.
Typ.
Max.
Units
Test Conditions/Notes
Input Voltage Range
1.5
V CC - 0.5
V
C L(10)
C IN(10)
Load Capacitance
Capacitances on Shutdown Pin
1
10
nF
pF
R OUT(10)
Output Impedance
3
?
at 5MHz, 1nF load
D.C. OPERATING CHARACTERISTICS
Recommended Operating Conditions: (Vcc, V+ = 4.75 to 5.25V; Vsense+, Vsense- = 26V; T A = -40°C to +85°C, unless
otherwise noted.)
Limits
Symbol
I CC1(9)
I CC2(9)(10)
I SB(9)
I LI
V IH(10)
Parameter
V+ Active Current
V CC Active Current
Standby Supply Current
(V CC , V+)
CS, SDA , SCL, SHDN RH, RL, RW,
INC/DEC VOUT, Input Leakage
CS, SDA, SCL, SHDN, A0, A1, A2
Min.
-10
V CC x 0.7
Typ.
1
5
1.5
Max.
3
25
10
V CC + 0.5
Units
mA
mA
mA
μA
V
Test Conditions
CS = V CC - 0.3V, and SCL
@ max. t CYC, SDA = V CC -
0.3V, SHDN inactive
CS = V IL , and SCL inactive
(no clock) , SDA = V IL , SHDN
active
V IN = VSS to V CC
HIGH Voltage
V IL(10)
CS, SDA, SCL, SHDN, A0, A1, A2
LOW Voltage
-0.5
V CC x 0.3
V
C IN(10)
CS, SDA, SCL, SHDN, A0, A1, A2
10
pF
V CC = 5V, V IN = VSS,
Capacitance
T A = 25°C, f = 1MHz
Notes: (1) V OUT is a high impedance output intended for light loads only.
(2) Gain at V OUT is set to 20 by default.
(3) Value given is for V OUT . The V BIAS output will depend on the V BIAS potentiometer which is initially loaded with a zero value, then fol-
lowed by the loading of the final value from E 2 memory.
(4) Gain Error excludes the contribution of the input offset voltage error.
(5) Total Error includes the contributions of gain error and input offset voltage error.
(6) Absolute Linearity is utilized to determine actual wiper voltage versus expected voltage = (V w(n) (actual) - V w(n) (expected))
(7) Relative Linearity is a measure of the error in step size between taps = V W(n+1) - [V w(n) + Ml]
(8) 1 Ml = Minimum Increment = R TOT /63 or R TOT /255.
(9) Typical values are for T A = 25°C and nominal supply voltage, VCC = 5V.
(10) This parameter is not 100% tested.
6
FN8204.0
March 8, 2005
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