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| 型号： | X9470V24I |
| 厂商： | Intersil |
| 文件页数： | 16/24页 |
| 文件大小： | 0K |
| 描述： | IC BIAS CTRLR RF PA 24-TSSOP |
| 标准包装： | 62 |
| RF 型： | CDMA，GSM，EDGE |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP 裸露焊盘 |
X9470
Figure 5. Operating modes X9470
State 0
State 1
State 2
State 3
State 4
PA
Monitor Mode
PA
Calibration Mode
PA
Transmit Mode
PA
Standby Mode
PA
Off Mode
PA Enabled, Vout and INC/DEC Monitored for status
Choose Vref to scale IDQ, perform calibration,
Latch bias point for DC bias current in wiper counter
Disable Bias Adjustment,
Recalibrate bias point for drift and temperature.
Rbias resistor will automatically increment or decrement
for optimal operating point continuously
Turn off PA
When no RF signal is present, the instrumentation
amplifier of the X9470 senses the drain current as a
voltage drop, ? V, across an external drain R sense
resistor. The ? V is amplified and compared to an
external scaling voltage, V REF . Any difference
between ? V and V REF results in a resistive increment
or decrement of the internal R BIAS potentiometer.
The R BIAS potentiometer is used as a voltage divider
with the RH BIAS and RL BIAS terminals setting the
upper and lower voltage limits of the unbuffered
RW BIAS voltage. The resolution of the R BIAS potenti-
ometer resistor is 0.4% of the difference of voltage
across the RH BIAS and RL BIAS terminals. The R TOTAL
is typically 10k ? with 256-taps. So, for example, if the
difference between the RH BIAS and RL BIAS terminals
is 1.024V, then the step accuracy is 4mV.
The voltage at the RW BIAS pin is then fed into the V BIAS
voltage follower. The V BIAS pin is a buffered output that is
used to drive the gate of an LDMOS transistor.
The scaling voltage, V REF , set by the R REF potentiom-
eter, sets the calibrated operating point of the LDMOS
Amplifier.
16
On edge transitions of the INC/DEC signal, the X9470
will latch the current wiper position - this is known as
“Bias Lock?” mode. This is shown in Figure 6. When
BiasLock occurs, the comparator hysteresis will allow
INC/DEC to change state only after the IA output
changes by more than 20mV. This will prevent toggling
of the V BIAS output unless the drain bias current is con-
stantly changing.
State 2: DC-bias Disable When RF is Present
(optional)
When an RF signal is present, the X9470 is put into
standby mode (open loop). The X9470 is in standby
mode when the CS pin is disabled so that the R BIAS
potentiometer holds the last wiper position. The pres-
ence of an RF signal at the input of a Class A or AB
amplifier increases the current across the R sense resis-
tor. Over a period of time, the temperature of the
LDMOS also increases and the LDMOS also experi-
ences V GS drift. Therefore the DC biasing point that
was set during State 1 (calibration) is not optimal.
Adjustments to the gate voltage will need to be made
to optimize the operation of the LDMOS PA. This is
done in State 3.
FN8204.0
March 8, 2005
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