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参数资料
| 型号： | X9470V24I |
| 厂商： | Intersil |
| 文件页数： | 9/24页 |
| 文件大小： | 0K |
| 描述： | IC BIAS CTRLR RF PA 24-TSSOP |
| 标准包装： | 62 |
| RF 型： | CDMA，GSM，EDGE |
| 封装/外壳： | 24-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 24-TSSOP 裸露焊盘 |
X9470
Power-up Timing
Symbol
Parameter
Min.
Max.
Unit
t r V CC
(10)
V CC Power-up rate
0.2
50
V/ms
Note:
Delays are measured from the time V CC is stable until the specified operation can be initiated. These parameters are not 100% tested.
Proper recall of stored wiper setting requires a V CC power-up ramp that is monotonic and with noise or glitches < 100mV. It is important to
correctly sequence voltages in an LDMOS amplifier circuit. For the X9470 typical application, the V CC , then V+ pins should be powered
before the V DD of the LDMOS to prevent LDMOS damage. Under no circumstances should the V DD be applied to the LDMOS device
before V CC and V+ are applied to the X9470.
DCP Default Power-up Tap Positions (shipped from factory)
VREF DCP
Bias Adjust DCP
Nonvolatile Write Cycle Timing
0
0
Symbol
Parameter
Min.
Typ. (1)
Max.
Unit
t WC
(10)
Write Cycle Time
5
10
ms
Note:
t WC is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It is the
minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
9
FN8204.0
March 8, 2005
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