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参数资料
型号： XC3S400AN-4FG400I
厂商： Xilinx Inc
文件页数： 76/123页
文件大小： 0K
描述： IC FPGA SPARTAN 3AN 400FBGA
标准包装： 60
系列： Spartan®-3AN
LAB/CLB数： 896
逻辑元件/单元数： 8064
RAM 位总计： 368640
输入/输出数： 311
门数： 400000
电源电压： 1.14 V ~ 1.26 V
安装类型： 表面贴装
工作温度： -40°C ~ 100°C
封装/外壳： 400-BGA
供应商设备封装： 400-FBGA（21x21）
Spartan-3AN FPGA Family: DC and Switching Characteristics
DS557 (v4.1) April 1, 2011
www.xilinx.com
Product Specification
56
Phase Shifter (PS)
Miscellaneous DCM Timing
Table 43: Recommended Operating Conditions for the PS in Variable Phase Mode
Symbol
Description
Speed Grade
Units
-5
-4
Min
Max
Min
Max
Operating Frequency Ranges
PSCLK_FREQ (FPSCLK) Frequency for the PSCLK input
1
167
1
167
MHz
Input Pulse Requirements
PSCLK_PULSE
PSCLK pulse width as a percentage of the PSCLK period
40%
60%
40%
60%
%
Table 44: Switching Characteristics for the PS in Variable Phase Mode
Symbol
Description
Phase Shift Amount
Units
Phase Shifting Range
MAX_STEPS(2,3)
Maximum allowed number of
DCM_DELAY_STEP steps for a given
CLKIN clock period, where T = CLKIN
clock period in ns. If using
CLKIN_DIVIDE_BY_2 = TRUE, double
the clock effective clock period.
CLKIN < 60 MHz
[INTEGER(10 (T
CLKIN – 3 ns))]
steps
CLKIN
60 MHz [INTEGER(15 (T
CLKIN – 3 ns))]
FINE_SHIFT_RANGE_MIN
Minimum guaranteed delay for variable phase shifting
[MAX_STEPS
DCM_DELAY_STEP_MIN]
ns
FINE_SHIFT_RANGE_MAX
Maximum guaranteed delay for variable phase shifting
[MAX_STEPS
DCM_DELAY_STEP_MAX]
ns
Notes:
1.
The numbers in this table are based on the operating conditions set forth in Table 10 and Table 43.
2.
The maximum variable phase shift range, MAX_STEPS, is only valid when the DCM is has no initial fixed phase shifting, that is, the
PHASE_SHIFT attribute is set to 0.
3.
The DCM_DELAY_STEP values are provided at the bottom of Table 40.
Table 45: Miscellaneous DCM Timing
Symbol
Description
Min
Max
Units
DCM_RST_PW_MIN
Minimum duration of a RST pulse width
3
–CLKIN
cycles
DCM_RST_PW_MAX(2)
Maximum duration of a RST pulse width
N/A
seconds
N/A
seconds
DCM_CONFIG_LAG_TIME(3)
Maximum duration from VCCINT applied to FPGA configuration
successfully completed (DONE pin goes High) and clocks
applied to DCM DLL
N/A
minutes
N/A
minutes
Notes:
1.
This limit only applies to applications that use the DCM DLL outputs (CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV).
The DCM DFS outputs (CLKFX, CLKFX180) are unaffected.
2.
This specification is equivalent to the Virtex
-4 FPGA DCM_RESET specification. This specification does not apply for Spartan-3AN
FPGAs.
3.
This specification is equivalent to the Virtex-4 FPGA TCONFIG specification. This specification does not apply for Spartan-3AN FPGAs.
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XC3S400AN-4FG400I4100 制造商:Xilinx 功能描述:
XC3S400AN-4FGG400C 功能描述:IC SPARTAN-3AN FPGA 400K 400FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Spartan®-3AN 标准包装:60 系列:XP LAB/CLB数:- 逻辑元件/单元数:10000 RAM 位总计:221184 输入/输出数:244 门数:- 电源电压:1.71 V ~ 3.465 V 安装类型:表面贴装 工作温度:0°C ~ 85°C 封装/外壳:388-BBGA 供应商设备封装:388-FPBGA（23x23） 其它名称:220-1241
XC3S400AN-4FGG400CES 制造商:Xilinx 功能描述:
XC3S400AN-4FGG400I 功能描述:IC FPGA SPARTAN-3A 400K 400-FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Spartan®-3AN 标准包装:40 系列:Spartan® 6 LX LAB/CLB数:3411 逻辑元件/单元数:43661 RAM 位总计:2138112 输入/输出数:358 门数:- 电源电压:1.14 V ~ 1.26 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:676-BGA 供应商设备封装:676-FBGA（27x27）
XC3S400AN-4FT256C 制造商:Xilinx 功能描述:SPARTAN3AN - Trays 制造商:Xilinx 功能描述:IC FPGA SPARTAN-3AN 400K 256BGA 制造商:Xilinx 功能描述:IC FPGA 195 I/O 256FTBGA
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