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参数资料
型号： XR16V798IQ-0B-EVB
厂商： Exar Corporation
文件页数： 51/56页
文件大小： 0K
描述： EVAL BOARD FOR XR16V798-B 100QFP
设计资源： XR17V798/794 Eval Board Schematic
标准包装： 1
系列： *
XR16V798
I
REV. 1.0.1
HIGH PERFORMANCE 2.25V TO 3.6V OCTAL UART WITH FRACTIONAL BAUD RATE
TABLE OF CONTENTS
GENERAL DESCRIPTION................................................................................................ 1
APPLICATIONS .............................................................................................................................................. 1
FEATURES .................................................................................................................................................... 1
FIGURE 1. BLOCK DIAGRAM ............................................................................................................................................................. 1
FIGURE 2. PIN OUT OF THE DEVICE.................................................................................................................................................. 2
ORDERING INFORMATION
............................................................................................................................... 2
PIN DESCRIPTIONS ........................................................................................................ 3
1.0 DESCRIPTION ......................................................................................................................................... 7
2.0 FUNCTIONAL DESCRIPTIONS .............................................................................................................. 7
2.1 DEVICE RESET ................................................................................................................................................... 7
2.1.1 HARDWARE RESET....................................................................................................................................................... 7
2.1.2 SOFTWARE RESET ....................................................................................................................................................... 7
2.2 UART CHANNEL SELECTION ........................................................................................................................... 7
TABLE 1: UART CHANNEL SELECTION ............................................................................................................................................. 7
2.3 SIMULTANEOUS WRITE TO ALL CHANNELS ................................................................................................. 7
2.4 INT# OUPUT ........................................................................................................................................................ 8
TABLE 2: INT# PIN OPERATION FOR TRANSMITTER ........................................................................................................................... 8
TABLE 3: INT# PIN OPERATION FOR RECEIVER ................................................................................................................................ 8
2.5 CRYSTAL OSCILLATOR / BUFFER................................................................................................................... 8
FIGURE 3. TYPICAL OSCILLATOR CONNECTIONS................................................................................................................................. 8
2.6 PROGRAMMABLE BAUD RATE GENERATOR WITH FRACTIONAL DIVISOR ............................................. 9
FIGURE 4. BAUD RATE GENERATOR ................................................................................................................................................. 9
TABLE 4: TYPICAL DATA RATES WITH A 24 MHZ CRYSTAL OR EXTERNAL CLOCK AT 16X SAMPLING ................................................... 10
2.7 TRANSMITTER.................................................................................................................................................. 10
2.7.1 TRANSMIT HOLDING REGISTER (THR) - WRITE ONLY........................................................................................... 11
2.7.2 TRANSMITTER OPERATION IN NON-FIFO MODE .................................................................................................... 11
FIGURE 5. TRANSMITTER OPERATION IN NON-FIFO MODE .............................................................................................................. 11
2.7.3 TRANSMITTER OPERATION IN FIFO MODE ............................................................................................................. 11
FIGURE 6. TRANSMITTER OPERATION IN FIFO AND FLOW CONTROL MODE ..................................................................................... 11
2.8 RECEIVER ......................................................................................................................................................... 12
2.8.1 RECEIVE HOLDING REGISTER (RHR) - READ-ONLY .............................................................................................. 12
FIGURE 7. RECEIVER OPERATION IN NON-FIFO MODE.................................................................................................................... 12
FIGURE 8. RECEIVER OPERATION IN FIFO AND AUTO RTS FLOW CONTROL MODE ......................................................................... 13
2.9 THR AND RHR REGISTER LOCATIONS ......................................................................................................... 13
TABLE 5: TRANSMIT AND RECEIVE HOLDING REGISTER LOCATIONS, 16C550 COMPATIBLE ............................................................... 14
2.10 AUTO RTS/DTR HARDWARE FLOW CONTROL OPERATION.................................................................... 15
2.10.1 AUTO CTS/DSR FLOW CONTROL............................................................................................................................ 15
FIGURE 9. AUTO RTS/DTR AND CTS/DSR FLOW CONTROL OPERATION........................................................................................ 16
2.11 AUTO XON/XOFF (SOFTWARE) FLOW CONTROL...................................................................................... 16
TABLE 6: AUTO XON/XOFF (SOFTWARE) FLOW CONTROL ............................................................................................................... 17
2.12 SPECIAL CHARACTER DETECT.................................................................................................................. 17
2.13 AUTO RS485 HALF-DUPLEX CONTROL ..................................................................................................... 17
2.14 INFRARED MODE ........................................................................................................................................... 17
FIGURE 10. INFRARED TRANSMIT DATA ENCODING AND RECEIVE DATA DECODING.......................................................................... 18
2.15 SLEEP MODE WITH AUTO WAKE-UP ......................................................................................................... 19
2.16 INTERNAL LOOPBACK.................................................................................................................................. 20
FIGURE 11. INTERNAL LOOP BACK ................................................................................................................................................. 20
3.0 XR16V798 REGISTERS ....................................................................................................................... 20
FIGURE 12. THE XR16V798 REGISTERS........................................................................................................................................ 21
3.1
DEVICE CONFIGURATION REGISTER SET .................................................................................. 21
TABLE 7: XR16V798 REGISTER SETS ............................................................................................................................................ 21
3.1.1 THE GLOBAL INTERRUPT SOURCE REGISTERS.................................................................................................... 22
TABLE 8: DEVICE CONFIGURATION REGISTERS ...............................................................................................................................22
3.1.1.1 INT0 CHANNEL INTERRUPT INDICATOR: ................................................................................................................ 23
3.1.1.2 INT1, INT2 AND INT3 INTERRUPT SOURCE LOCATOR ........................................................................................... 23
FIGURE 13. THE GLOBAL INTERRUPT REGISTERS, INT0, INT1, INT2 AND INT3 .............................................................................. 23
TABLE 9: UART CHANNEL [7:0] INTERRUPT SOURCE ENCODING AND CLEARING ............................................................................. 23
3.1.2 GENERAL PURPOSE 16-BIT TIMER/COUNTER [TIMERMSB, TIMELSB, TIMER, TIMECNTL] (DEFAULT 0XXX-XX-
00-00) ............................................................................................................................................................................. 24
3.1.2.1 TIMERMSB [7:0] AND TIMERLSB [7:0]............................................................................................................. 24
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