参数资料
| 型号： | XRT75R12IB |
| 厂商： | Exar Corporation |
| 文件页数： | 17/90页 |
| 文件大小： | 0K |
| 描述： | IC LIU E3/DS3/STS-1 12CH 420TBGA |
| 标准包装： | 40 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 12/12 |
| 规程： | DS3，E3，STS-1 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 420-LBGA 裸露焊盘 |
| 供应商设备封装： | 420-TBGA（35x35） |
| 包装： | 托盘 |
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XRT75R12
21
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
REV. 1.0.4
3.0
THE RECEIVER SECTION
The receiver is designed so that the LIU can recover clock and data from an attenuated line signal caused by
cable loss or flat loss according to industry specifications.
Once data is recovered, it is processed and
presented at the receiver outputs according to the format chosen to interface with a Framer/Mapper or ASIC.
This section describes the detailed operation of various blocks within the receive path. A simplified block
diagram of the receive path is shown in Figure 5.
FIGURE 5. RECEIVE PATH BLOCK DIAGRAM
3.1
Receive Line Interface
Physical Layer devices are AC coupled to a line interface through a 1:1 transformer. The transformer provides
isolation and a level shift by blocking the DC offset of the incoming data stream. The typical medium for the
line interface is a 75
coxial cable. Whether using E3, DS-3 or STS-1, the LIU requires the same bill of
materials, see Figure 6.
FIGURE 6. RECEIVE LINE INTERFACECONNECTION
3.2
Adaptive Gain Control (AGC)
The Adaptive Gain Control circuit amplifies the incoming analog signal and compensates for the various flat
losses and also for the loss at one-half symbol rate. The AGC has a dynamic range of 30 dB. The peak
detector provides feedback to the equalizer before slicing occurs.
3.3
Receive Equalizer
The Equalizer restores the integrity of the signal and compensates for the frequency dependent attenuation of
up to 900 feet of coaxial cable (1300 feet for E3). The Equalizer also boosts the high frequency content of the
signal to reduce Inter-Symbol Interference (ISI) so that the slicer slices the signal at 50% of peak voltage to
generate Positive and Negative data. The equalizer can be disabled by programming the appropriate register.
Channel n
HDB3/
B3ZS
Decoder
MUX
AGC/
Equalizer
Peak Detector
LOS
Detector
Slicer
Jitter
Attenuator
Clock & Data
Recovery
RxClk_n
RxPOS_n
RxNEG/LCV_n
RLOS_n
RTIP_n
RRing_n
DS-3/E3/STS-1
1:1
Receiver
75
RLOS_n
RTIP_n
RRing_n
37.5
0.01
F
37.5
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT75R12IB-F | 功能描述:外围驱动器与原件 - PCI 12 Channel 3.3V-5V temp -45 to 85C RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| XRT75R12IB-L | 功能描述:LIN 收发器 Attenuator RoHS:否 制造商:NXP Semiconductors 工作电源电压: 电源电流: 最大工作温度: 封装 / 箱体:SO-8 |
| XRT75VL00 | 制造商:EXAR 制造商全称:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75VL00_08 | 制造商:EXAR 制造商全称:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR |
| XRT75VL00D | 制造商:EXAR 制造商全称:EXAR 功能描述:E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER |
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