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参数资料
型号： XRT94L31IB
厂商： Exar Corporation
文件页数： 83/133页
文件大小： 0K
描述： IC MAPPER DS3/E3/STS-1 504TBGA
标准包装： 24
应用： 网络切换
接口： 总线
电源电压： 3.14 V ~ 3.47 V
封装/外壳： 504-LBGA
供应商设备封装： 504-TBGA（35x35）
包装： 托盘
安装类型： 表面贴装
XRT94L31
53
REV. 1.0.1
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
B22
STS1TXA_1_D2
TXHDLCDAT_1_2
TXCELLTXED_1
I/O
TTL/
CMOS
Transmit STS-1 Telecom Bus Interface - Channel 1 - Data Bus Input
pin number 2/Transmit High-Speed HDLC Controller Input Interface
block - Channel 1 - Input Data Bus - Pin 2:
The function of this pin depends upon whether or not the STS-1 Telecom
Bus Interface, associated with Channel 1 is enabled.
If STS-1 Telecom Bus (Channel 1) has been enabled - Transmit STS-
1 Telecom Bus Interface - Input Data Bus pin number 2 -
STS1TXA_1_D2:
This input pin along with STS1TXA_1_D[7:3] and STS1TXA_1_D[1:0]
function as the Transmit (Add) STS-1 Telecom Bus Interface - Input Data
Bus for Channel 1. The Transmit STS-1 Telecom Bus interface will sam-
ple and latch this pin upon the falling edge of STS1TXA_CLK_1.
If the STS-1 Telecom Bus Interface (associated with Channel 1) has
been disabled.
This input/output pin can function in either of the following roles, depend-
ing upon which mode the XRT94L31 has been configured to operate in,
as described below.
If the XRT94L31 has been configured to operate in the High-Speed
HDLC Controller over DS3/STS-3 Mode - Transmit High-Speed
HDLC Controller Input Interface block - Transmit High-Speed HDLC
Controller Input Interface block - Channel 1 - Data Bus Input pin # 2
- TxHDLCDAT_1_2:
If the XRT94L31 is configured to operate in the High-Speed HDLC Con-
troller over DS3/STS-3 Mode, then this input pin will function as Bit 1
within the Transmit High-Speed HDLC Controller Input Interface block -
Input Data Bus (e.g., the TxHDLCDat_1[7:0] input pins).
The Transmit High-Speed HDLC Controller Input Interface block will pro-
vide the System-Side Terminal equipment with a byte-wide Transmit
High-Speed HDLC Controlller clock output signal (TxHDLCClk_1). The
Transmit High-Speed HDLC Controller Input Interface block will sample
the data residing on this input pin (along with the rest of the
TxHDLCDat_1[7:0] input pins) upon the rising edge of the TxHDLCClk_1
clock output signal.
If the XRT94L31 has been configured to operate in the ATM UNI
Mode
- TXCELLTXED_1 (Cell Transmitted - Channel 1)
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
SIGNAL NAME
I/O
TYPE
DESCRIPTION
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XRT94L31IB-F 功能描述:网络控制器与处理器 IC Demapper RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
XRT94L31IB-L 功能描述:网络控制器与处理器 IC Mapper / Demapper RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
XRT94L33 制造商:EXAR 制造商全称:EXAR 功能描述:-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - SONET REGISTERS
XRT94L33_06 制造商:EXAR 制造商全称:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
XRT94L33_07 制造商:EXAR 制造商全称:EXAR 功能描述:3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - ATM REGISTERS
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