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| 型号： | ZL2105EVK2 |
| 厂商： | Intersil |
| 文件页数： | 12/36页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD 2 ZL2105 |
| 标准包装： | 1 |
| 系列： | * |
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ZL2105
4.3 Power Management Overview
The ZL2105 incorporates a wide range of configurable
power management features that are simple to
implement with no external components. Additionally,
the ZL2105 includes circuit protection features that
continuously safeguard the device and load from
damage due to unexpected system faults. The ZL2105
can continuously monitor input voltage, output
Logic
high
Open
Logic
low
ZL2105
Multi-mode Pin
Pin-strap
Settings
R SET
ZL2105
Multi-mode Pin
Resistor
Settings
voltage/current, internal temperature,
and
the
Figure 7. Pin-strap and Resistor Setting Examples
temperature of an external thermal diode. A Power
Good output signal is also included to enable power-on
reset functionality for an external processor.
All power management functions can be configured
or via the I 2 C/SMBus interface. Monitoring parameters
can also be pre-configured to provide alerts for specific
conditions. See Application Note AN2013 for more
details on SMBus monitoring.
4.4 Multi-mode Pins
Most power management features can be configured
using the multi-mode pins. The multi-mode pins can
respond to four different connections as shown in
or by issuing a PMBus Restore command (See
Application Note AN2013).
Pin-strap Settings: Using this method, each pin can
take on one of three possible states: LOW, OPEN, or
HIGH. These pins can be connected to the VR or V25
pins for logic HIGH settings, as either pin provides a
regulated voltage higher than 2 V. Using a single pin
one of three settings can be selected, and using two
pins the user can select one of nine settings.
Table 5. Multi-mode Pin Configuration
Resistor Settings: This method allows a greater range
of adjustability when connecting a finite value resistor
(in a specified range) between the multi-mode pin and
SGND. Standard 1% resistor values are used, and only
every fourth E96 resistor value is used so the device
can reliably recognize the value of resistance
connected to the pin while eliminating the error
associated with the resistor accuracy. A total of 25
unique selections are available using a single resistor.
I 2 C/SMBus Method: Almost any ZL2105 function can
be configured via the I 2 C/SMBus interface using
standard PMBus commands. Additionally, any value
that has been configured using the pin-strap or resistor
setting methods can also be re-configured and/or
verified via the I 2 C/SMBus. See Application Note
AN2013 for more details.
The SMBus device address and VOUT_MAX are the
only parameters that must be set by external pins. All
other device parameters can be set via the I 2 C/SMBus.
The device address is set using the SA pin.
VOUT_MAX is determined as 10% greater than the
voltage set by the V0 and V1 pins.
Pin Tied To
LOW
(Logic LOW)
OPEN
(N/C)
HIGH
(Logic HIGH)
Resistor to SGND
12
Value
< 0.8 VDC
No connection
> 2.0 VDC
Set by resistor value
FN6851.2
March 30, 2011
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