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参数资料
| 型号： | ZL2105EVK2 |
| 厂商： | Intersil |
| 文件页数： | 5/36页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD 2 ZL2105 |
| 标准包装： | 1 |
| 系列： | * |
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ZL2105
Table 3. Electrical Characteristics (continued)
V DDP = V DDS = 12 V, T A = -40 C to 85 C unless otherwise noted. Typical values are at T A = 25 C.
Parameter
Conditions
Min
(Note 3)
Typ
Max
(Note 3)
Unit
Oscillator and Switching Characteristics
Switch node current, I SW
Switching frequency range
Switching frequency set-point accuracy
Minimum SYNC pulse width
Input clock frequency drift tolerance
Maximum duty cycle
R DS(ON) of High Side N-channel FETs
R DS(ON) of Low Side N-channel FETs
Sourcing or Sinking
Predefined settings
External clock source
I SW = 1 A, V GS = 4.7 V
I SW =1A, V GS =8.5V, Charge Pump
I SW =1A, V GS =12V
–
200
-5
150
-13
90
–
–
–
3
–
–
–
–
–
125
123
114
4.0
2000
5
–
13
–
180
140
130
A
kHz
%
ns
%
%
m ?
m ?
m ?
Fault Protection Characteristics
UVLO threshold range
UVLO setpoint accuracy
3.79
-2
–
–
13.2
2
V
%
UVLO hysteresis
UVLO delay
Power good low threshold
Power good high threshold
Power good hysteresis
Power good delay
VSEN undervoltage threshold
VSEN overvoltage threshold
VSEN undervoltage hysteresis
VSEN undervoltage/ overvoltage fault
response time
Peak current limit threshold
Current limit setpoint accuracy
Current limit shutdown delay
Thermal protection threshold (junction
temperature)
Thermal protection hysteresis
Factory default
Configurable via I 2 C/SMBus
Factory default
Factory default
Factory default
Using pin-strap or resistor 1
Configurable via I 2 C/SMBus
Factory default
Configurable via I 2 C/SMBus
Factory default
Configurable via I 2 C/SMBus
Factory default
Configurable via I 2 C/SMBus
Using ILIM pin or via I 2 C/SMBus
Factory default
Configurable via I 2 C/SMBus
Factory default
Configurable via I 2 C/SMBus
–
0
–
–
–
–
0
0
–
0
–
0
–
–
5
0.2
–
–
1
–
-40
–
3
–
–
90
115
5
–
–
85
–
115
–
5
16
–
–
±100
5
–
125
–
15
–
100
2.5
–
–
–
200
500
–
110
–
115
–
–
60
4.5
–
–
32
–
125
–
%
%
μs
% V OUT
% V OUT
%
ms
s
% V OUT
% V OUT
% V OUT
% V OUT
% V O
μs
μs
A
mA
t SW 2
t SW 2
°C
°C
°C
Notes:
1. Factory default Power Good delay is set to the same value as the soft start ramp time.
2. t SW = 1/f SW , where f SW is the switching frequency.
3. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
5
FN6851.2
March 30, 2011
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