- 您现在的位置：买卖IC网 > PDF目录300164 > ZL50112GAG2 (ZARLINK SEMICONDUCTOR INC) SPECIALTY TELECOM CIRCUIT, PBGA552 PDF资料下载
参数资料
| 型号： | ZL50112GAG2 |
| 厂商： | ZARLINK SEMICONDUCTOR INC |
| 元件分类： | 通信及网络 |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PBGA552 |
| 封装： | 35 X 35 MM, 1.27 MM, LEAD FREE, PLASTIC, BGA-552 |
| 文件页数： | 8/113页 |
| 文件大小： | 1923K |
| 代理商： | ZL50112GAG2 |
第1页第2页第3页第4页第5页第6页第7页当前第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页
ZL50110/11/12/14
Data Sheet
105
Zarlink Semiconductor Inc.
13.1.1
External Memory Interface - special considerations during layout
The timing of address, data and control are all related to the system clock which is also used by the external
SSRAM to clock these signals. Therefore the propagation delay of the clock to the ZL50110/11/12/14 and the
SSRAM must be matched to within 250 ps, worst case conditions. Trace lengths of theses signals must also be
minimized (<100 mm) and matched to ensure correct operation under all conditions.
13.1.2
GMAC Interface - special considerations during layout
The GMII interface passes data to and from the ZL50110/11/12/14 with their related transmit and receive clocks. It
is therefore recommended that the trace lengths for transmit related signals and their clock and the receive related
signals and their clock are kept to the same length. By doing this the skew between individual signals and their
related clock will be minimized.
13.1.3
TDM Interface - special considerations during layout
Although the data rate of this interface is low the outputs edge speeds share the characteristics of the higher data
rate outputs and therefore must be treated with the same care extended to the other interfaces with particular
reference to the lower stream numbers which support the higher data rates. The TDM interface has numerous
clocking schemes and as a result of this the input clock traces to the ZL50110/11/12/14 devices should be treated
with care.
13.1.4
Summary
Particular effort should be made to minimize crosstalk from ZL50110/11/12/14 outputs and ensuring fast rise time to
these inputs.
In Summary:
Place series termination resistors as close to the pins as possible
Minimize output capacitance
Keep common interface traces close to the same length to avoid skew
Protect input clocks and signals from crosstalk
13.2
CPU TA Output
The CPU_TA output signal from the ZL50110/11/12/14 is a critical handshake signal to the CPU that ensures the
correct completion of a bus transaction between the two devices. As the signal is critical, it is recommend that the
circuit shown in Figure 50 - CPU_TA Board Circuit is implemented in systems operating above 40 MHz bus
frequency to ensure robust operation under all conditions.
The following external logic is required to implement the circuit:
74LCX74 dual D-type flip-flop (one section of two)
74LCX08 quad AND gate (one section of four)
74LCX125 quad tri-state buffer (one section of four)
4K7 resistor x2
相关PDF资料 |
PDF描述 |
|---|---|
| ZL50112GAG | SPECIALTY TELECOM CIRCUIT, PBGA552 |
| ZL50114GAG2 | SPECIALTY TELECOM CIRCUIT, PBGA552 |
| ZL50114GAG | SPECIALTY TELECOM CIRCUIT, PBGA552 |
| ZL50232GD | DATACOM, ISDN ECHO CANCELLER, PBGA208 |
| ZL50233/GDG | DATACOM, ISDN ECHO CANCELLER, PBGA208 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ZL50114 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:128, 256, 512 and 1024 Channel CESoP Processors |
| ZL50114GAG | 制造商:Microsemi Corporation 功能描述:CESOP PROCESSOR 552BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 552PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 552PBGA |
| ZL50114GAG2 | 制造商:Microsemi Corporation 功能描述:CESOP PROCESSOR 552BGA - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 128CH 552PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 128CH 552PBGA |
| ZL50115 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:32, 64 and 128 Channel CESoP Processors |
| ZL50115GAG | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 324BGA - Trays 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 32CH 324PBGA |
发布紧急采购，3分钟左右您将得到回复。