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| 型号： | 71M6511-IGTR/F |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64 |
| 封装： | LEAD FREE, LQFP-64 |
| 文件页数： | 15/98页 |
| 文件大小： | 1278K |
| 代理商： | 71M6511-IGTR/F |
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71M6511/71M6511H
Single-Phase Energy Meter IC
DATA SHEET
NOVEMBER 2010
Page: 22 of 98
2005–2010 Teridian Semiconductor Corporation
V2.7
A Maxim Integrated Products Brand
A single SFR register serves as both the transmit buffer and receive buffer (S0BUF, SFR 0x99 for UART0 and S1BUF, SFR
0x9C for UART1). When written by the MPU, SxBUF acts as the transmit buffer, and when read by the MPU, it acts as the
receive buffer.
Writing data to the transmit buffer starts the transmission by the associated UART.
Received data are
available by reading from the receive buffer. Both UARTs can simultaneously transmit and receive data.
WDCON[7] selects whether timer 1 or the internal baud rate generator is used. All UART transfers are programmable for parity
enable, parity, 2 stop bits/1 stop bit and XON/XOFF options for variable communication baud rates from 300 to 38400 bps.
Table 13 shows how the baud rates are calculated. Table 14 shows the selectable UART operation modes.
Using Timer 1
Using Internal Baud Rate Generator
Serial Interface 0
2
smod * f
CKMPU/ (384 * (256-TH1))
2
smod * f
CKMPU/(64 * (2
10-S0REL))
Serial Interface 1
N/A
fCKMPU/(32 * (2
10-S1REL))
Note: S0REL and S1REL are 10-bit values derived by combining bits from the respective timer reload registers. SMOD is the
SMOD bit in the SFR PCON. TH1 is the high byte of timer 1.
Table 13: Baud Rate Generation
UART 0
UART 1
Mode 0
N/A
Start bit, 8 data bits, parity, stop bit, variable
baud rate (internal baud rate generator)
Mode 1
Start bit, 8 data bits, stop bit,
variable baud rate (internal baud
rate generator or timer 1)
Start bit, 8 data bits, stop bit, variable baud rate
(internal baud rate generator)
Mode 2
Start bit, 8 data bits, parity, stop bit,
fixed baud rate 1/32 or 1/64 of
fCKMPU
N/A
Mode 3
Start bit, 8 data bits, parity, stop bit,
variable baud rate (internal baud
rate generator or timer 1)
N/A
Table 14: UART Modes
Parity of serial data is available through the P flag of the accumulator. Seven-bit serial modes with parity, such as those used
by the FLAG protocol, can be simulated by setting and reading bit 7 of 8-bit output data. Seven-bit serial modes without parity
can be simulated by setting bit 7 to a constant 1. 8-bit serial modes with parity can be simulated by setting and reading the 9
th
bit, using the control bits TB80 (S0CON.3) and TB81 (S1CON.3) in the S0COn and S1CON SFRs for transmit and RB81
(S1CON.2) for receive operations. SM20 (S0CON.5) and SM21 (S1CON.5) can be used as handshake signals for inter-pro-
cessor communication in multi-processor systems.
Serial Interface 0 Control Register (S0CON).
The function of the UART0 depends on the setting of the Serial Port Control Register S0CON.
MSB
LSB
SM0
SM1
SM20
REN0
TB80
RB80
TI0
RI0
Table 15: The S0CON Register
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| 71M6511-IGT/F | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64 |
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