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参数资料
| 型号： | 71M6511-IGTR/F |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64 |
| 封装： | LEAD FREE, LQFP-64 |
| 文件页数： | 95/98页 |
| 文件大小： | 1278K |
| 代理商： | 71M6511-IGTR/F |
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71M6511/71M6511H
Single-Phase Energy Meter IC
DATA SHEET
NOVEMBER 2010
Page: 95 of 98
2005–2010 Teridian Semiconductor Corporation
V2.7
A Maxim Integrated Products Brand
Digital Pins:
Name
Pin #
Type
Circuit
Description
COM3,
COM2,
COM1,
COM0
16
15
14
13
O
5
LCD Common Outputs: These 4 pins provide the select signals for the
LCD display.
SEG19…SEG8,
SEG2…SEG0
See
pinout
O
5
Dedicated LCD Segment Output pins.
SEG24/DIO4…
SEG31/DIO11,
SEG34/DIO14…
SEG37/DIO17
See
pinout
O
3, 4, 5
Multi-use pins, configurable as either LCD SEG driver or DIO (DIO4 =
SCK, DIO5 = SDA when configured as EEPROM interface, WPULSE
= DIO6, VARPULSE = DIO7 when configured as pulse outputs). If
unused, these pins must be configured as outputs.
SEG7/
MUX_SYNC
24
O
4, 5
Multi-use-pin LCD Segment Output/ MUX_SYNC is output for
Synchronous serial interface
SEG6/SRDY
23
I/O
2, 5
Multi-use-pin, LCD Segment Outputs/ SRDY input for Synchronous
serial interface. When configured as SRDY, this pin must be pulled
down to GNDD.
SEG5/SFR
11
O
4, 5
Multi-use-pin, LCD Segment Output/ SFR output for Synchronous
serial interface.
SEG4/SDATA
10
O
4, 5
Multi-use-pin, LCD Segment Output/ SDATA output for Synchronous
serial interface.
SEG3/SCLK
6
O
4, 5
Multi-use-pin, LCD Segment Output/ SCLK output for Synchronous
serial interface.
CKTEST
8
O
4
Clock PLL output. Can be enabled and disabled by CKOUT_DIS.
TMUXOUT
4
O
4
Digital output test multiplexer. Controlled by DMUX[3:0].
OPT_RX
57
I
7
Optical Receive Input: This pin may receive a signal from an external
photo-detector used in an IR serial interface. If this pin is unused it
must be terminated to V3P3D or GNDD.
OPT_TX
3
O
4
Optical LED Transmit Output: This pin is designed to directly drive an
LED for transmitting data in an IR serial interface. Can be tristated with
OPT_TXDIS to be multiplexed with other DIO pins.
RESETZ
48
I
1
This input pin resets the chip into a known state. For normal operation,
this pin is set to 1. To reset the chip, this pin is driven to 0. This pin
has an internal 30μA (nominal) current source pull up. A 0.1F ca-
pacitor to GNDD should be connected to this pin. See the precau-
tions in the Applications Section for terminating this pin.
RX
45
I
3
UART input. The voltage applied at this input must be below 3.6V.
If this pin is unused it must be terminated to V3P3D or GNDD.
TX
5
O
4
UART output.
E_RXTX
2
I/O
1, 4
Emulator serial data. This pin has an internal pull-up resistor.
E_TCLK
64
O
4
Emulator clock.
E_RST
63
I/O
1, 4
Emulator reset. This pin has an internal pull-up resistor. See the
precautions in the Applications Section for terminating this pin.
TEST
60
I
7
Enables Production Test. This pin must be grounded in normal
operation.
Pin types: P = Power, O = Output, I = Input, I/O = Input/Output
The circuit number denotes the equivalent circuit, as specified on the following page.
相关PDF资料 |
PDF描述 |
|---|---|
| 71M6511-IGT/F | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64 |
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| 71M6511-IGTR | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64 |
| 71M6511H-IGTR/F | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64 |
| 71M6511H-IGT/F | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64 |
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