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| 型号： | 71M6511-IGTR/F |
| 厂商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64 |
| 封装： | LEAD FREE, LQFP-64 |
| 文件页数： | 4/98页 |
| 文件大小： | 1278K |
| 代理商： | 71M6511-IGTR/F |
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71M6511/71M6511H
Single-Phase Energy Meter IC
DATA SHEET
NOVEMBER 2010
Page: 12 of 98
2005–2010 Teridian Semiconductor Corporation
V2.7
A Maxim Integrated Products Brand
Address (hex)
Name
Description
0x00
IA
Phase A current
0x01
VA
Phase A voltage
0x02
IB
Phase B current
0x03
-
Reserved
0x04
-
Reserved
0x05
-
Reserved
0x06
TEMP
Temperature
0x07
--
Reserved
Table 3: CE DRAM Locations for ADC Results
Meter Equations
The Compute Engine (CE) program for residential meter configurations implements the equations in Table 4. The I/O RAM
register EQU specifies the equation to be used based on the number and arrangement of phases used for metering. In case of
single-phase metering, the unconnected input should be tied to V3P3A, the analog supply voltage. The EQU selection enables
the 71M6511 to calculate single-phase power measurement based on the type of service used. Table 4 also states the
sequence of the multiplexer in the AFE.
EQU
Formula
Channels used from MUX
Sequence
States 0
→ 3
Channels used from alternative
MUX Sequence
States 0
→ 3
0
1
2
3
0
1
2
3
000
VA IA
(1 element, 2W 1
φ)
IA
VA
IB
-
TEMP
VA
-
001
VA(IA-IB)/2
(1 element, 3W 1
φ)
IA
VA
IB
-
TEMP
VA
IB
-
Table 4: Standard Meter Equations (inputs shown gray are scanned but not used for calculation)
Pulse Generator
The CE contains two pulse generators which create low jitter pulses at a rate set by the CE DRAM registers APULSEW*WRATE
and APULSER*WRATE if EXT_PULSE (a CE input variable in CE DRAM) is 15. This mode puts the MPU in control of pulse
generation by placing values into the APULSEW and APULSER registers (“external pulse generation”).
If EXT_PULSE is 0, APULSEW is replaced with WSUM_X and APULSER is replaced with VARSUM_X. In this mode, the CE
generates pulse based on its internal computation of WSUM_X and VARSUM_X, the signed sums of energy from all three
elements (“internal pulse generation”).
The DIO_PV and DIO_PW bits as described in the Digital I/O section can be programmed to route WPULSE and VARPULSE
to the output pins DIO6 and DIO7 respectively. DIO6 and DIO7 can be configured to generate interrupts (useful for pulse
counting by the MPU – see On-Chip Resources (DIO Section).
相关PDF资料 |
PDF描述 |
|---|---|
| 71M6511-IGT/F | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64 |
| 71M6511-IGT | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64 |
| 71M6511-IGTR | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64 |
| 71M6511H-IGTR/F | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64 |
| 71M6511H-IGT/F | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64 |
相关代理商/技术参数 |
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|---|---|
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