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参数资料
型号： 71M6511-IGTR/F
厂商： MAXIM INTEGRATED PRODUCTS INC
元件分类： 电源管理
英文描述： 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64
封装： LEAD FREE, LQFP-64
文件页数： 34/98页
文件大小： 1278K
代理商： 71M6511-IGTR/F
71M6511/71M6511H
Single-Phase Energy Meter IC
DATA SHEET
NOVEMBER 2010
Page: 4 of 98
2005–2010 Teridian Semiconductor Corporation
V2.7
A Maxim Integrated Products Brand
RESETZ.....................................................................................................................................90
COMPARATORS .......................................................................................................................90
RAM AND FLASH MEMORY ......................................................................................................91
FLASH MEMORY TIMING..........................................................................................................91
EEPROM INTERFACE ...............................................................................................................91
Recommended External Components.......................................................................................................91
Packaging Information..............................................................................................................................92
Pinout (Top View).......................................................................................................................93
Pin Descriptions .........................................................................................................................94
I/O Equivalent Circuits: ...............................................................................................................96
ORDERING INFORMATION ....................................................................................................................97
Figures
Figure 1: IC Functional Block Diagram..........................................................................................................................7
Figure 2: General Topology of a Chopped Amplifier.....................................................................................................10
Figure 3: AFE Block Diagram......................................................................................................................................11
Figure 4: Samples in Multiplexer Cycle .......................................................................................................................13
Figure 5: Accumulation Interval..................................................................................................................................13
Figure 6: Memory Map..............................................................................................................................................15
Figure 7: Interrupt Structure ......................................................................................................................................36
Figure 8: DIO Ports Block Diagram.............................................................................................................................37
Figure 9: Oscillator Circuit .........................................................................................................................................40
Figure 10: LCD Voltage Boost Circuitry.......................................................................................................................41
Figure 11: Voltage Range for V1 ................................................................................................................................43
Figure 12: Voltage. Current, Momentary and Accumulated Energy................................................................................47
Figure 13: Timing Relationship between ADC MUX, CE, and Serial Transfers ................................................................48
Figure 14: RTM Output Format ..................................................................................................................................49
Figure 15: SSI Timing, (SSI_FPOL = SSI_RDYPOL = 0) ............................................................................................49
Figure 16: SSI Timing, 16-bit Field Example (External Device Delays SRDY) .................................................................49
Figure 17: MPU/CE Data Flow ....................................................................................................................................50
Figure 18: MPU/CE Communication (Functional).........................................................................................................51
Figure 19: MPU/CE Communication (Processing Sequence)........................................................................................51
Figure 20: Timing Diagram for Voltages, Current and Operation Modes after Power-Up.................................................52
Figure 21: Chop Polarity w/ Automatic Chopping ........................................................................................................54
Figure 22: Sequence with Alternate Multiplexer Cycles ................................................................................................54
Figure 23: Sequence with Alternate Multiplexer Cycles and Controlled Chopping...........................................................55
Figure 24: Wh Accuracy, 0.3A - 200A/240V ................................................................................................................75
Figure 25: VARh Accuracy for 0.3A to 200A/240V Performance...................................................................................75
Figure 27: Meter Accuracy over Harmonics at 240V, 30A ............................................................................................76
Figure 29: Resistive Voltage Divider (left), Current Transformer (right).........................................................................77
Figure 30: Resistive Shunt (left), Rogowski Coil (right) ...............................................................................................77
Figure 31: Crystal Frequency over Temperature ..........................................................................................................78
Figure 32: Crystal Compensation ...............................................................................................................................79
Figure 33: Connecting LCDs ......................................................................................................................................80
Figure 34: LCD Boost Circuit......................................................................................................................................81
Figure 35: EEPROM Connection.................................................................................................................................82
Figure 36: Interfacing RX to a 0-5V Signal..................................................................................................................82
Figure 37: Connection for Optical Components ...........................................................................................................83
Figure 38: Voltage Divider for V1 ...............................................................................................................................83
Figure 39: External Components for RESETZ ..............................................................................................................84
相关PDF资料
PDF描述
71M6511-IGT/F 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64
71M6511-IGT 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64
71M6511-IGTR 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64
71M6511H-IGTR/F 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64
71M6511H-IGT/F 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP64
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