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| 型号： | A4935KJPTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 18/25页 |
| 文件大小： | 0K |
| 描述： | IC MOSFET DVR AUTO 3PH 48-LQFP |
| 标准包装： | 1 |
| 配置： | 3 相桥 |
| 输入类型： | PWM |
| 延迟时间： | 90ns |
| 配置数： | 1 |
| 输出数： | 3 |
| 电源电压： | 5.5 V ~ 50 V |
| 工作温度： | -40°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP 裸露焊盘 |
| 供应商设备封装： | 48-LQFP 裸露焊盘（7x7） |
| 包装： | 标准包装 |
| 产品目录页面： | 1141 (CN2011-ZH PDF) |
| 其它名称： | 620-1300-6 |
A4935
Automotive 3-Phase MOSFET Driver
is set to zero by connecting RDEAD to AGND, the fault blank
time typically defaults to 2 μ s.
The voltage drop across the bootstrap capacitor as the FET is
being turned on, ? V , can be approximated by:
Cross-Conduction
? V ≈
Q GATE
C BOOT
.
(4)
In some circumstances it is desirable to allow activation of both
high-side and low-side FETs in a single phase of the power
bridge. This can be used, with care, to reduce diode conduction
during synchronous rectification, which improves overall effi-
ciency and reduces electromagnetic emissions.
This mode of operation is also useful for independently control-
ling each phase of a VR motor or to turn on all high-side and low-
side FETs together, to cause a supply short circuit for blowing a
safety fuse.
Cross-conduction can occur only when the internally-generated
dead time is set to zero by connecting RDEAD to AGND and, at
the same time, CCEN is high. If zero internally-generated dead
time is required, but cross-conduction is to be prevented, then
CCEN can be tied to AGND. When the dead time is set to zero
So, for a factor of 20, ? V would be approximately 5% of V BOOT .
The maximum voltage across the bootstrap capacitor under
normal operating conditions is V REG (max). However, in some
circumstances the voltage may transiently reach 18 V, the clamp
voltage of the Zener diodes between the Cx and Sx pins. In most
applications, with a good ceramic capacitor the working voltage
can be limited to 16 V.
Bootstrap Charging
It is good practice to ensure the high-side bootstrap capacitor is
completely charged before a high-side PWM cycle is requested.
The time required to charge the capacitor, t CHARGE ( μ s), is
approximated by:
it is still possible for some overlap to be present at the switching
instants due to the relative switching time of the FETs.
t CHARGE =
C BOOT × ? V
100
,
(5)
Bootstrap Capacitor Selection
The bootstrap capacitors, C BOOTx , must be correctly selected to
ensure proper operation of the A4935. If the capacitances are too
high, time will be wasted charging the capacitor, resulting in a
limit on the maximum duty cycle and the PWM frequency. If the
capacitances are too low, there can be a large voltage drop at the
time the charge is transferred from C BOOTx to the FET gate, due
to charge sharing.
To keep this voltage drop small, the charge in the bootstrap
capacitor, Q BOOT , should be much larger than the charge required
by the gate of the FET, Q GATE . A factor of 20 is a reasonable
value, and the following formula can be used to calculate the
value for C BOOT :
where C BOOT is the value of the bootstrap capacitor, in nF, and
? V is the required voltage of the bootstrap capacitor.
At power-up and when the drives have been disabled for a long
time, the bootstrap capacitor can be completely discharged. In
this case ? V can be considered to be the full high-side drive
voltage, 12 V. Otherwise, ? V is the amount of voltage dropped
during the charge transfer, which should be 400 mV or less.
The capacitor is charged whenever the Sx pin is pulled low and
current flows from VREG through the internal bootstrap diode
circuit to C BOOT .
Bootstrap Charge Management
The A4935 provides automatic bootstrap capacitor charge
management. The bootstrap capacitor voltage for each phase
Q BOOT = C BOOT × V BOOT = Q GATE × 20 ,
therefore:
Q GATE × 20
C BOOT = ,
V BOOT
where V BOOT is the voltage across the bootstrap capacitor.
(3)
is continuously checked to ensure that it is above the bootstrap
under-voltage threshold, V BOOTUV . If the bootstrap capacitor volt-
age drops below this threshold, the A4935 will turn on the neces-
sary low-side FET, and continue charging until the bootstrap
capacitor exceeds the undervoltage threshold plus the hysteresis,
V BOOTUV + V BOOTUVhys . The minimum charge time is typically
7 μ s, but may be longer for very large values of bootstrap capaci-
18
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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