- 您现在的位置：买卖IC网 > PDF目录373897 > AD73322 (Analog Devices, Inc.) Low Cost, Low Power CMOS General Purpose Dual Analog Front End(低成本，低功耗的CMOS通用双模拟前端处理器) PDF资料下载
参数资料
| 型号： | AD73322 |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | Low Cost, Low Power CMOS General Purpose Dual Analog Front End(低成本，低功耗的CMOS通用双模拟前端处理器) |
| 中文描述： | 低成本，低功耗CMOS通用双模拟前端（低成本，低功耗的的CMOS通用双模拟前端处理器） |
| 文件页数： | 15/43页 |
| 文件大小： | 427K |
| 代理商： | AD73322 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页当前第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页
AD73322
–15–
REV. 0
ADC
Both ADCs consist of an analog sigma-delta modulator and a
digital antialiasing decimation filter. The sigma-delta modu-
lator noise-shapes the signal and produces 1-bit samples at a
DMCLK/8 rate. This bitstream, representing the analog input
signal, is input to the antialiasing decimation filter. The decimation
filter reduces the sample rate and increases the resolution.
Analog Sigma-Delta Modulator
The AD73322’s input channels employ a sigma-delta conver-
sion technique, which provides a high resolution 16-bit output
with system filtering being implemented on-chip.
Sigma-delta converters employ a technique known as over-
sampling, where the sampling rate is many times the highest
frequency of interest. In the case of the AD73322, the initial
sampling rate of the sigma-delta modulator is DMCLK/8. The
main effect of oversampling is that the quantization noise is
spread over a very wide bandwidth, up to F
S
/2 = DMCLK/16
(Figure 10a). This means that the noise in the band of interest is
much reduced. Another complementary feature of sigma-delta
converters is the use of a technique called noise-shaping. This
technique has the effect of pushing the noise from the band of
interest to an out-of-band position (Figure 10b). The combi-
nation of these techniques, followed by the application of a
digital filter, sufficiently reduces the noise in band to ensure
good dynamic performance from the part (Figure 10c).
BAND
OF
INTEREST
F
S
/2
DMCLK/16
F
S
/2
DMCLK/16
F
S
/2
DMCLK/16
DIGITAL FILTER
NOISE SHAPING
BAND
OF
INTEREST
BAND
OF
INTEREST
a.
b.
c.
Figure 10. Sigma-Delta Noise Reduction
Figure 11 shows the various stages of filtering that are employed
in a typical AD73322 application. In Figure 11a we see the
transfer function of the external analog antialias filter. Even
though it is a single RC pole, its cutoff frequency is sufficiently
far away from the initial sampling frequency (DMCLK/8) that it
takes care of any signals that could be aliased by the sampling
frequency. This also shows the major difference between the
initial oversampling rate and the bandwidth of interest. In Fig-
ure 11b, the signal and noise-shaping responses of the sigma-
delta modulator are shown. The signal response provides further
rejection of any high frequency signals while the noise-shaping
will push the inherent quantization noise to an out-of-band
position. The detail of Figure 11c shows the response of the
digital decimation filter (Sinc-cubed response) with nulls every
multiple of DMCLK/256, which corresponds to the decimation
filter update rate for a 64 kHz sampling. The nulls of the Sinc3
response correspond with multiples of the chosen sampling
frequency. The final detail in Figure 11d shows the application
of a final antialias filter in the DSP engine. This has the advan-
tage of being implemented according to the user’s requirements
and available MIPS. The filtering in Figures 11a through 11c is
implemented in the AD73322.
F
B
= 4kHz
F
SINIT
= DMCLK/8
a. Analog Antialias Filter Transfer Function
F
B
= 4kHz
F
SINIT
= DMCLK/8
NOISE TRANSFER FUNCTION
SIGNAL TRANSFER FUNCTION
b. Analog Sigma-Delta Modulator Transfer Function
F
B
= 4kHz
F
SINTER
= DMCLK/256
c. Digital Decimator Transfer Function
F
B
= 4kHz
F
SINTER
= DMCLK/256
F
SFINAL
= 8kHz
d. Final Filter LPF (HPF) Transfer Function
Figure 11. ADC Frequency Responses
相关PDF资料 |
PDF描述 |
|---|---|
| AD73411 | Low-Power CMOS Analog Front End with DSP Microcomputer(带DSP微计算机的单模拟前端) |
| AD73422-40K | Integrated Dual Analog Front End Codec And DSP Microcomputer(集成双模拟前端的信号编解码器和数字信号处理器的芯片) |
| AD73422BB-80 | Dual Low Power CMOS Analog Front End with DSP Microcomputer |
| AD73422 | Dual Low Power CMOS Analog Front End with DSP Microcomputer(带DSP微计算机的双模拟前端) |
| AD73422BB-40 | Dual Low Power CMOS Analog Front End with DSP Microcomputer |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD73322AR | 制造商:Analog Devices 功能描述:IC AUDIO CODEC |
| AD73322AR-REEL | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 2DAC 16-Bit 28-Pin SOIC W T/R |
| AD73322AR-REEL7 | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 2DAC 16-Bit 28-Pin SOIC W T/R |
| AD73322ARZ | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 2DAC 16-Bit 28-Pin SOIC W 制造商:Analog Devices 功能描述:AUD CODEC 2ADC / 2DAC 16BIT 28SOIC - Trays 制造商:Analog Devices 功能描述:Dual Voice Band Codec 16-Bit 3/5V SOIC28 |
| AD73322ARZ-REEL | 制造商:Analog Devices 功能描述:DUAL VOICE BAND ANALOG FRONT END IC (ROHS) - Tape and Reel 制造商:Analog Devices 功能描述:DUAL VOICEBAND ANALOG FRONT END IC |
发布紧急采购，3分钟左右您将得到回复。