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参数资料
| 型号： | AD73322 |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | Low Cost, Low Power CMOS General Purpose Dual Analog Front End(低成本，低功耗的CMOS通用双模拟前端处理器) |
| 中文描述： | 低成本，低功耗CMOS通用双模拟前端（低成本，低功耗的的CMOS通用双模拟前端处理器） |
| 文件页数： | 5/43页 |
| 文件大小： | 427K |
| 代理商： | AD73322 |
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–5–
REV. 0
AD73322
SPECIFICATIONS
1
AD73322A
Typ
Parameter
Min
Max
Units
Test Conditions/Comments
REFERENCE
REFCAP
Absolute Voltage, VREFCAP
1.2
2.4
50
V
V
ppm/
°
C
5VEN = 0
5VEN = 1
0.1
μ
F Capacitor Required from
REFCAP to AGND2
REFCAP TC
REFOUT
Typical Output Impedance
Absolute Voltage, VREFOUT
130
1.2
2.4
V
V
k
pF
5VEN = 0, Unloaded
5VEN = 1, Unloaded
5VEN = 1
Minimum Load Resistance
Maximum Load Capacitance
2
100
INPUT AMPLIFIER
Offset
Maximum Output Swing
Feedback Resistance
Feedback Capacitance
±
1.0
3.156
50
100
mV
V
k
pF
Max Output Swing = (3.156/2.4)
×
VREFCAP
f
C
= 32 kHz
ANALOG GAIN TAP
Gain at Maximum Setting
Gain at Minimum Setting
Gain Resolution
Gain Accuracy
Settling Time
Delay
+1
–1
5
±
1
1.0
0.5
V
V
Bits
%
μ
s
μ
s
Gain Step Size = 0.0625
Output Unloaded
Tap Gain Change of –FS to +FS
ADC SPECIFICATIONS
Maximum Input Range at VIN
2, 3
5VEN = 1
Measured Differentially
Max Input Swing = (3.156/2.4)
×
VREFCAP
Measured Differentially
3.156
3.17
2.1908
0
V p-p
dBm
V p-p
dBm
Nominal Reference Level at VIN
(0 dBm0)
Absolute Gain
PGA = 0 dB
PGA = 38 dB
Gain Tracking Error
Signal to (Noise + Distortion)
PGA = 0 dB
0.4
–0.7
±
0.1
dB
dB
dB
1.0 kHz, 0 dBm0
1.0 kHz, 0 dBm0
1.0 kHz, +3 dBm0 to –50 dBm0
Refer to Figure 7
300 Hz to 3400 Hz; f
SAMP
= 64 kHz
300 Hz to 3400 Hz; f
SAMP
= 8 kHz
0 Hz to f
SAMP
/2; f
SAMP
= 64 kHz
300 Hz to 3400 Hz; f
SAMP
= 64 kHz
78
78
57
56
dB
dB
dB
dB
PGA = 38 dB
Total Harmonic Distortion
PGA = 0 dB
PGA = 38 dB
Intermodulation Distortion
Idle Channel Noise
Crosstalk
–84
–70
–65
–71
–100
dB
dB
dB
dBm0
dB
300 Hz to 3400 Hz; f
SAMP
= 64 kHz
300 Hz to 3400 Hz; f
SAMP
= 64 kHz
PGA = 0 dB
PGA = 0 dB
ADC Input Signal Level: 1.0 kHz, 0 dBm0
DAC Input at Idle
ADC1 Input Signal Level: 1.0 kHz, 0 dBm0
ADC2 Input at Idle. Input Amplifiers Bypassed
Input Amplifiers Included in Channel
PGA = 0 dB
Input Signal Level at AVDD and DVDD
Pins: 1.0 kHz, 100 mV p-p Sine Wave
64 kHz Output Sample Rate
Input Amplifiers Bypassed
ADC-to-DAC
ADC-to-ADC
–100
dB
–70
+10
–65
dB
mV
dB
DC Offset
Power Supply Rejection
Group Delay
4, 5
Input Resistance at PGA
2,
4, 6
25
20
μ
s
k
(AVDD = +5 V
6
10%; DVDD = +5 V
6
10%; DGND = AGND = 0 V, f
MCLK
= 16.384 MHz, f
SAMP
= 64 kHz;
T
A
= T
MIN
to T
MAX
, unless otherwise noted)
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD73322AR | 制造商:Analog Devices 功能描述:IC AUDIO CODEC |
| AD73322AR-REEL | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 2DAC 16-Bit 28-Pin SOIC W T/R |
| AD73322AR-REEL7 | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 2DAC 16-Bit 28-Pin SOIC W T/R |
| AD73322ARZ | 制造商:Analog Devices 功能描述:Audio Codec 2ADC / 2DAC 16-Bit 28-Pin SOIC W 制造商:Analog Devices 功能描述:AUD CODEC 2ADC / 2DAC 16BIT 28SOIC - Trays 制造商:Analog Devices 功能描述:Dual Voice Band Codec 16-Bit 3/5V SOIC28 |
| AD73322ARZ-REEL | 制造商:Analog Devices 功能描述:DUAL VOICE BAND ANALOG FRONT END IC (ROHS) - Tape and Reel 制造商:Analog Devices 功能描述:DUAL VOICEBAND ANALOG FRONT END IC |
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