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参数资料
| 型号： | AD73422 |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | Dual Low Power CMOS Analog Front End with DSP Microcomputer(带DSP微计算机的双模拟前端) |
| 中文描述： | 双低功耗CMOS模拟前端（带DSP的微计算机的双模拟前端与DSP的微机） |
| 文件页数： | 16/36页 |
| 文件大小： | 396K |
| 代理商： | AD73422 |
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REV. 0
AD73422
–
16
–
Table X. Control Word Description
5
1
4
1
3
1
2
1
1
1
0
1
9
8
7
6
5
4
3
2
1
0
/
C
D
/
R
W
S
S
E
R
D
D
A
E
C
I
V
E
D
S
S
E
R
D
D
A
R
E
T
S
I
G
E
R
A
T
A
D
R
E
T
S
I
G
E
R
Control
Frame
Description
Bit 15
Control/
Data
When set high, it signifies a control word in Program or Mixed Program/Data Modes. When set low, it
signifies a data word in Mixed Program/Data Mode or an invalid control word in Program Mode.
When set low, it tells the device that the data field is to be written to the register selected by the regis-
ter field setting provided the address field is zero. When set high, it tells the device that the selected
register is to be written to the data field in the input serial register and that the new control word is to
be output from the device via the serial output.
This 3-bit field holds the address information. Only when this field is zero is a device selected. If the
address is not zero, it is decremented and the control word is passed out of the device via the serial
output.
Register Address This 3-bit field is used to select one of the five control registers on the AFE section of the AD73422.
Register Data
This 8-bit field holds the data that is to be written to or read from the selected register provided the
address field is zero.
Bit 14
Read/
Write
Bits 13–11 Device Address
Bits 10–8
Bits 7–0
Table XI. Control Register A Description
A
R
E
T
S
I
G
E
R
L
O
R
T
N
O
C
7
6
5
4
3
2
1
0
T
E
S
E
R
2
C
D
1
C
D
0
C
D
B
L
S
B
L
D
M
M
/
A
T
M
A
G
D
P
Bit
Name
Description
0
1
2
3
4
5
6
7
DATA/
PGM
MM
DLB
SLB
DC0
DC1
DC2
RESET
Operating Mode (0 = Program; 1 = Data Mode)
Mixed Mode (0 = Off; 1 = Enabled)
Digital Loop-Back Mode (0 = Off; 1 = Enabled)
SPORT Loop-Back Mode (0 = Off; 1 = Enabled)
Device Count (Bit 0)
Device Count (Bit 1)
Device Count (Bit 2)
Software Reset (0 = Off; 1 = Initiates Reset)
Table XII. Control Register B Description
B
R
E
T
S
I
G
E
R
L
O
R
T
N
O
C
7
6
5
4
3
2
1
0
E
E
C
2
D
C
M
1
D
C
M
0
D
C
M
1
D
C
S
0
D
C
S
1
R
I
D
0
R
I
D
Bit
Name
Description
0
1
2
3
4
5
6
7
DIR0
DIR1
SCD0
SCD1
MCD0
MCD1
MCD2
CEE
Decimation/Interpolation Rate (Bit 0)
Decimation/Interpolation Rate (Bit 1)
Serial Clock Divider (Bit 0)
Serial Clock Divider (Bit 1)
Master Clock Divider (Bit 0)
Master Clock Divider (Bit 1)
Master Clock Divider (Bit 2)
Control Echo Enable (0 = Off; 1 = Enabled)
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| AD73422BBZ-40 | 制造商:Analog Devices 功能描述:AUD CODEC 2ADC / 2DAC 16BIT 119BGA - Bulk |
| AD7342AST-REEL | 制造商:Rochester Electronics LLC 功能描述:- Tape and Reel 制造商:Analog Devices 功能描述: |
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