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| 型号： | AD7712ARZ-REEL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 7/28页 |
| 文件大小： | 0K |
| 描述： | IC ADC 24BIT SGNL CONDTNR 24SOIC |
| 标准包装： | 1,000 |
| 位数： | 24 |
| 采样率（每秒）： | 1.03k |
| 数据接口： | 串行 |
| 转换器数目： | 1 |
| 功率耗散（最大）： | 45mW |
| 电压电源： | 模拟和数字，双 ± |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 24-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 24-SOIC W |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 1 个单端，单极；1 个差分，单极；1 个差分，双极 |
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REV. F
AD7712
–15–
Antialias Considerations
The digital filter does not provide any rejection at integer mul-
tiples of the modulator sample frequency (n
19.5 kHz, where
n = 1, 2, 3 . . . ). This means that there are frequency bands,
±f
3 dB wide (f3 dB is cutoff frequency selected by FS0 to FS11),
where noise passes unattenuated to the output. However, due to
the AD7712’s high oversampling ratio, these bands occupy only
a small fraction of the spectrum, and most broadband noise is
filtered. In any case, because of the high oversampling ratio, a
simple, RC, single-pole filter is generally sufficient to attenuate
the signals in these bands on the analog input and thus provide
adequate antialiasing filtering.
If passive components are placed in front of the AIN1 input of the
AD7712, care must be taken to ensure that the source impedance
is low enough so as not to introduce gain errors in the system. The
dc input impedance for the AIN1 input is over 1 G
. The input
appears as a dynamic load that varies with the clock frequency
and with the selected gain (see Figure 7). The input sample
rate, as shown in Table III, determines the time allowed for the
analog input capacitor, CIN, to be charged. External impedances
result in a longer charge time for this capacitor, which may result
in gain errors being introduced on the analog inputs. Table IV
shows the allowable external resistance/capacitance values
such that no gain error to the 16-bit level is introduced, while
Table V shows the allowable external resistance/capacitance
values such that no gain error to the 20-bit level is introduced.
Both inputs of the differential input channels (AIN1) look into
similar input circuitry.
RINT
(7k
TYP)
CINT
(11.5pF TYP)
VBIAS
AIN
SWITCHING FREQUENCY DEPENDS ON
fCLKIN AND SELECTED GAIN
HIGH
IMPEDANCE
>1G
Figure 7. AIN1 Input Impedance
Table IV. Typical External Series Resistance That Will Not
Introduce 16-Bit Gain Error
External Capacitance (pF)
Gain
0
50
100
500
1000
5000
1
184 k
45.3 k 27.1 k 7.3 k 4.1 k 1.1 k
2
88.6 k
22.1 k 13.2 k 3.6 k 2.0 k 560
4
41.4 k
10.6 k 6.3 k
1.7 k
970
270
8–128
17.6 k
4.8 k
2.9 k
790
440
120
Table V. Typical External Series Resistance That Will Not
Introduce 20-Bit Gain Error
External Capacitance (pF)
Gain
0
50
100
500
1000
5000
1
145 k
34.5 k 20.4 k 5.2 k 2.8 k 700
2
70.5 k
16.9 k 10 k
2.5 k
1.4 k 350
4
31.8 k
8.0 k
4.8 k
1.2 k
670
170
8–128
13.4 k
3.6 k
2.2 k
550
300
80
The numbers in Tables IV and V assume a full-scale change on
the analog input. In any case, the error introduced due to longer
charging times is a gain error that can be removed using the
system calibration capabilities of the AD7712 provided that the
resultant span is within the span limits of the system calibration
techniques for the AD7712.
The AIN2 input contains a resistive attenuation network as
outlined in Figure 8. The typical input impedance on this input
is 44 k
. As a result, the AIN2 input should be driven from a
low impedance source.
33k
VBIAS
AIN2
11k
MODULATOR
CIRCUIT
Figure 8. AIN2 Input Impedance
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| AD7712ARZ-REEL7 | 功能描述:IC ADC 24BIT SGNL CONDTNR 24SOIC RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1 系列:- 位数:14 采样率（每秒）:83k 数据接口:串行，并联 转换器数目:1 功率耗散（最大）:95mW 电压电源:双 ± 工作温度:0°C ~ 70°C 安装类型:通孔 封装/外壳:28-DIP（0.600"，15.24mm） 供应商设备封装:28-PDIP 包装:管件 输入数目和类型:1 个单端，双极 |
| AD7712EB | 制造商:AD 制造商全称:Analog Devices 功能描述:LC 2 MOS Signal Conditioning ADC(229.08 k) |
| AD7712SQ | 制造商:Analog Devices 功能描述: 制造商:Rochester Electronics LLC 功能描述:24 BIT SIGMA DELTA ADC IC - Bulk |
| AD7713 | 制造商:AD 制造商全称:Analog Devices 功能描述:LC2MOS Loop-Powered Signal Conditioning ADC |
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