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参数资料
| 型号： | AD9522-0/PCBZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 72/84页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR AD9522-0 CLK GEN |
| 设计资源： | AD9522 Eval Board Schematic AD9522 BOM |
| 标准包装： | 1 |
| 主要目的： | 计时，时钟发生器 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | AD9522-0 |
| 主要属性： | 12 LVDS/24 CMOS 输出，2.8 GHz VCO |
| 次要属性： | I²C & SPI 接口 |
| 已供物品： | 板 |
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AD9522-0
Rev. 0 | Page 74 of 84
Reg.
Addr
(Hex) Bit(s) Name
Description
01F
[2]
REF2 frequency
> threshold
(read-only)
Readback register. Indicates if the frequency of the signal at REF2 is greater than the threshold frequency
set by Register 0x01A[6].
[2] = 0; REF2 frequency is less than the threshold frequency.
[2] = 1; REF2 frequency is greater than the threshold frequency.
01F
[1]
REF1 frequency
> threshold
(read-only)
Readback register. Indicates if the frequency of the signal at REF1 is greater than the threshold frequency
set by Register 0x01A[6].
[1] = 0; REF1 frequency is less than the threshold frequency.
[1] = 1; REF1 frequency is greater than the threshold frequency.
01F
[0]
Digital lock
detect
(read-only)
Readback register. Digital lock detect.
[0] = 0; PLL is not locked.
[0] = 1; PLL is locked.
Table 53. Output Driver Control
Reg.
Addr
(Hex) Bit(s) Name
Description
0F0
[7]
OUT0 format
Selects the output type for OUT0.
[7] = 0; LVDS (default).
[7] = 1; CMOS.
0F0
[6:5]
OUT0 CMOS
configuration
Sets the CMOS output configuration for OUT0 when 0x0F0[7] = 1.
[6:5]
OUT0A
OUT0B
00
Tristate
01
On
Tristate
10
Tristate
On
11 (default)
On
0F0
[4:3]
OUT0 polarity
Sets the output polarity for OUT0.
[7]
[4]
[3]
Output Type
OUT0A
OUT0B
0 (default)
X
0
LVDS
Noninverting
Inverting
0
X
1
LVDS
Inverting
Noninverting
1
0 (default)
CMOS
Noninverting
1
0
1
CMOS
Inverting
1
0
CMOS
Noninverting
Inverting
1
CMOS
Inverting
Noninverting
0F0
[2:1]
OUT0 LVDS
differential
voltage
Sets the LVDS output differential voltage (VOD).
[2]
[1]
IOD (mA)
0
1.75 (VOD = 175 mV for 100 Ω termination across differential pair)
0 (default)
1 (default)
3.5 (VOD = 350 mV for 100 Ω termination across differential pair)
1
0
5.25 (VOD = 525 mV for 100 Ω termination across differential pair)
1
7.0 (VOD = 700 mV for 100 Ω termination across differential pair)
0F0
[0]
OUT0 LVDS
power-down
LVDS power-down.
[0] = 0; normal operation (default).
[0] = 1; power-down. Output driver is in a high impedance state.
0F1
[7:0]
OUT1 control
This register controls OUT1, and the bit assignments for this register are identical to Register 0x0F0.
0F2
[7:0]
OUT2 control
This register controls OUT2, and the bit assignments for this register are identical to Register 0x0F0.
0F3
[7:0]
OUT3 control
This register controls OUT3, and the bit assignments for this register are identical to Register 0x0F0.
0F4
[7:0]
OUT4 control
This register controls OUT4, and the bit assignments for this register are identical to Register 0x0F0.
0F5
[7:0]
OUT5 control
This register controls OUT5, and the bit assignments for this register are identical to Register 0x0F0.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9522-1 | 制造商:AD 制造商全称:Analog Devices 功能描述:12 LVDS/24 CMOS Output Clock Generator with Integrated 2.4 GHz VCO |
| AD9522-1/PCBZ | 功能描述:BOARD EVAL FOR AD9522-1 CLK GEN RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:- 标准包装:1 系列:- 主要目的:电信，线路接口单元（LIU） 嵌入式:- 已用 IC / 零件:IDT82V2081 主要属性:T1/J1/E1 LIU 次要属性:- 已供物品:板，电源，线缆，CD 其它名称:82EBV2081 |
| AD9522-1BCPZ | 功能描述:IC CLOCK GEN 2.5GHZ VCO 64LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:Precision Edge® 类型:时钟/频率合成器 PLL:无 输入:CML，PECL 输出:CML 电路数:1 比率 - 输入:输出:2:1 差分 - 输入:输出:是/是 频率 - 最大:10.7GHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) 其它名称:SY58052UMGTRSY58052UMGTR-ND |
| AD9522-1BCPZ-REEL7 | 功能描述:IC CLOCK GEN 2.5GHZ VCO 64LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 时钟发生器 PLL:带旁路 输入:LVCMOS，LVPECL 输出:LVCMOS 电路数:1 比率 - 输入:输出:2:11 差分 - 输入:输出:是/无 频率 - 最大:240MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:带卷 (TR) |
| AD9522-2 | 制造商:AD 制造商全称:Analog Devices 功能描述:12 LVDS/24 CMOS Output Clock Generator with Integrated 2.2 GHz VCO |
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