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| 型号： | AD9981KSTZ-80 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 27/44页 |
| 文件大小： | 0K |
| 描述： | IC INTERFACE 10BIT ANALOG 80LQFP |
| 标准包装： | 90 |
| 应用： | 视频 |
| 接口： | 模拟 |
| 电源电压： | 3.13 V ~ 3.47 V |
| 封装/外壳： | 80-LQFP |
| 供应商设备封装： | 80-LQFP（14x14） |
| 包装： | 管件 |
| 安装类型： | 表面贴装 |
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AD9981
Rev. 0 | Page 33 of 44
Table 28. Coast Source Selection Settings
Select
Result
0
Vsync (internal Coast)
1
COAST input pin
0x18
6
Coast Polarity Override
This register is used to override the internal circuitry
that determines the polarity of the Coast signal going
into the PLL. The power-up default setting is 0.
Table 29. Coast Polarity Override Settings
Override Bit
Result
0
Coast polarity determined by chip
1
Coast polarity determined by user
0x18
5
Input Coast Polarity
This register sets the input Coast polarity when Bit 6
of Register 0x18 = 1. The power-up default setting is 1.
Table 30. Coast Polarity Settings
Coast Polarity Bit
Result
0
Coast polarity is negative
1
Coast polarity is positive
0x18
4
Clamp Source
This bit determines the source of clamp timing. A 0
enables the clamp timing circuitry controlled by
clamp placement and clamp duration. The clamp posi-
tion and duration is counted from the leading edge of
Hsync. A 1 enables the external clamp input pin. The
three channels are clamped when the clamp signal is
active. The polarity of clamp is determined by the
clamp polarity bit. The power-up default setting
is 0.
Table 31. Clamp Source Selection Settings
Clamp Source
Result
0
Internally generated clamp
1
Externally provided clamp signal
0x18
3
Red Clamp Select
This bit determines whether the red channel is
clamped to ground or to midscale. The power-up
default setting is 0.
Table 32. Red Clamp Select Settings
Clamp
Result
0
Clamp to ground
1
Clamp to midscale
0x18
2
Green Clamp Select
This bit determines whether the green channel is
clamped to ground or to midscale. The power-up
default setting is 0.
Table 33. Green Clamp Select Settings
Clamp
Result
0
Clamp to ground
1
Clamp to midscale
0x18
1
Blue Clamp Select
This bit determines whether the blue channel is
clamped to ground or to midscale. The power-up
default setting is 0.
Table 34. Blue Clamp Select Settings
Clamp
Result
0
Clamp to ground
1
Clamp to midscale
0x19
7:0
Clamp Placement
An 8-bit register that sets the position of the internally
generated clamp. When EXTCLMP = 0 (Register 0x18,
Bit 4), a clamp signal is generated internally, at a
position established by the clamp placement register
(Register 0x19) and for a duration set by the clamp
duration register (Register 0x1A). Clamping is started
a clamp placement count(Register 0x19) of pixel
periods after the trailing edge of Hsync. The clamp
placement may be programmed to any value between
1 and 255. A value of 0 is not supported.
The clamp should be placed during a time that the
input signal presents a stable black-level reference,
usually the back porch period between Hsync and the
image. When EXTCLMP = 1, this register is ignored.
Power-up default setting is 8.
0x1A
7:0
Clamp Duration
An 8-bit register that sets the duration of the
internally generated clamp. When EXTCLMP = 0
(Register 0x18, Bit 4), a clamp signal is generated
internally at a position established by the clamp
placement register (and for a duration set by the
clamp duration register). Clamping begins a clamp
placement count (Register 0x19) of pixel periods after
the trailing edge of Hsync. The clamp duration may be
programmed to any value between 1 and 255. A value
of 0 is not supported.
For the best results, the clamp duration should be set
to include the majority of the black reference signal
time that follows the Hsync signal trailing edge. Insuf-
ficient clamping time can produce brightness changes
at the top of the screen, and a slow recovery from large
changes in the average picture level (APL), or bright-
ness. When EXTCLMP = 1, this register is ignored.
Power-up default setting is 20 DDR.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9981KSTZ-95 | 功能描述:IC INTERFACE 10BIT ANALOG 80LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1 |
| AD9981XSTZ-110 | 制造商:Analog Devices 功能描述:HIGH PERFORMANCE 10-BIT DISPLAY INTERFACE - Bulk |
| AD9983A | 制造商:AD 制造商全称:Analog Devices 功能描述:High Performance 8-Bit Display Interface |
| AD9983A/PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:High Performance 8-Bit Display Interface |
| AD9983A/PCBZ | 功能描述:KIT EVALUATION AD9983A RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:Advantiv® 标准包装:1 系列:PCI Express® (PCIe) 主要目的:接口，收发器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要属性:- 次要属性:- 已供物品:板 |
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