- 您现在的位置：买卖IC网 > PDF目录11768 > AD9981KSTZ-80 (Analog Devices Inc)IC INTERFACE 10BIT ANALOG 80LQFP PDF资料下载
参数资料
| 型号： | AD9981KSTZ-80 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 6/44页 |
| 文件大小： | 0K |
| 描述： | IC INTERFACE 10BIT ANALOG 80LQFP |
| 标准包装： | 90 |
| 应用： | 视频 |
| 接口： | 模拟 |
| 电源电压： | 3.13 V ~ 3.47 V |
| 封装/外壳： | 80-LQFP |
| 供应商设备封装： | 80-LQFP（14x14） |
| 包装： | 管件 |
| 安装类型： | 表面贴装 |
第1页第2页第3页第4页第5页当前第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页
AD9981
Rev. 0 | Page 14 of 44
PIXEL CLOCK
INVALID SAMPLE TIMES
04739-005
Figure 6. Pixel Sampling Times
Any jitter in the clock reduces the precision with which the
sampling time can be determined and must also be subtracted
from the stable pixel time. Considerable care has been taken in
the design of the AD9981’s clock generation circuit to minimize
jitter. The clock jitter of the AD9981 is 9% or less of the total
pixel time in all operating modes, making the reduction in the
valid sampling time due to jitter negligible.
The PLL characteristics are determined by the loop filter design,
the PLL charge pump current, and the VCO range setting. The
loop filter design is illustrated in Figure 7. Recommended
settings of the VCO range and charge pump current for VESA
standard display modes are listed in Table 9.
CP
8nF
CZ
80nF
RZ
1.5k
FILT
PVD
04739-006
Figure 7. PLL Loop Filter Detail
Four programmable registers are provided to optimize the
performance of the PLL. These registers are
1.
The 12-Bit Divisor Register. The input Hsync frequencies
can accommodate any Hsync as long as the product of the
Hsync and the PLL divisor falls within the operating range
of the VCO. The PLL multiplies the frequency of the Hsync
signal, producing pixel clock frequencies in the range of
10 MHz to 95 MHz. The divisor register controls the exact
multiplication factor. This register may be set to any value
between 2 and 4095 as long as the output frequency is
within range.
2.
The 2-Bit VCO Range Register. To improve the noise
performance of the AD9981, the VCO operating frequency
range is divided into four overlapping regions. The VCO
range register sets this operating range. The frequency
ranges for the four regions are shown in Table 7.
Table 7. VCO Frequency Ranges
PV1
PV0
Pixel Clock
Range (MHz)
KVCO
Gain (MHz/V)
0
10–21
150
0
1
21–42
150
1
0
42–84
150
1
84-95
150
3.
The 3-Bit Charge Pump Current Register. This register
varies the current that drives the low-pass loop filter. The
possible current values are listed in Table 8.
Table 8. Charge Pump Current/Control Bits
Ip2
Ip1
Ip0
Current (A)
0
50
0
1
100
0
1
0
150
0
1
250
1
0
350
1
0
1
500
1
0
750
1
1500
4.
The 5-Bit Phase Adjust Register. The phase of the gen-
erated sampling clock may be shifted to locate an optimum
sampling point within a clock cycle. The phase adjust
register provides 32 phase-shift steps of 11.25° each. The
Hsync signal with an identical phase shift is available
through the HSOUT pin. Phase adjust is still available if an
external pixel clock is used. The COAST pin or the internal
Coast is used to allow the PLL to continue to run at the
same frequency in the absence of the incoming Hsync
signal or during disturbances in Hsync (such as from
equalization pulses). This may be used during the vertical
sync period or at any other time that the Hsync signal is
unavailable. The polarity of the Coast signal may be set
through the Coast polarity register (Register 0x18,
Bits [6:5]). Also, the polarity of the Hsync signal may
be set through the Hsync polarity register (Register 0x12,
Bits [5:4]). For both Hsync and Coast, a value of 1 is active
high. The internal Coast function is driven off the Vsync
signal, which is typically a time when Hsync signals may be
disrupted with extra equalization pulses.
相关PDF资料 |
PDF描述 |
|---|---|
| PIC16LF1906-I/MV | MCU PIC 512B FLASH XLP 28-UQFN |
| VI-B41-IX-F1 | CONVERTER MOD DC/DC 12V 75W |
| MS27505E21B39P | CONN RCPT 39POS BOX MNT W/PINS |
| PIC16F721-I/P | MCU PIC 4K FLASH 20-DIP |
| 5227079-6 | CONN PLUG BNC RG55,223 CRIMP AU |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9981KSTZ-95 | 功能描述:IC INTERFACE 10BIT ANALOG 80LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1 |
| AD9981XSTZ-110 | 制造商:Analog Devices 功能描述:HIGH PERFORMANCE 10-BIT DISPLAY INTERFACE - Bulk |
| AD9983A | 制造商:AD 制造商全称:Analog Devices 功能描述:High Performance 8-Bit Display Interface |
| AD9983A/PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:High Performance 8-Bit Display Interface |
| AD9983A/PCBZ | 功能描述:KIT EVALUATION AD9983A RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:Advantiv® 标准包装:1 系列:PCI Express® (PCIe) 主要目的:接口，收发器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要属性:- 次要属性:- 已供物品:板 |
发布紧急采购，3分钟左右您将得到回复。