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| 型号： | AD9981KSTZ-80 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 8/44页 |
| 文件大小： | 0K |
| 描述： | IC INTERFACE 10BIT ANALOG 80LQFP |
| 标准包装： | 90 |
| 应用： | 视频 |
| 接口： | 模拟 |
| 电源电压： | 3.13 V ~ 3.47 V |
| 封装/外壳： | 80-LQFP |
| 供应商设备封装： | 80-LQFP（14x14） |
| 包装： | 管件 |
| 安装类型： | 表面贴装 |
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AD9981
Preliminary Technical Data
Rev. 0 | Page 16 of 44
ACTIVITY
DETECT
AD9981
SYNC
PROCESSOR
PLL CLOCK
GENERATOR
CHANNE
L
MUX
SOGOUT
MUX
SET
POLA
R
ITY
HSYNC
MUX
COAST
MUX
EQ PULSE
FILTER
CHANNE
L
MUX
CHANNE
L
MUX
HSYNC0
HSYNC1
SOGOUT
VSYNCOUT
VSYNC
HSYNC
COAST
DATACK
SOGIN0
SOGIN1
COAST
04739-013
POLARITY
DETECT
CHANNEL
SELECT
HSYNC
SELECT
FILTERED,
RECONSTRUCTED
HSYNC
ACTIVITY
DETECT
POLARITY
DETECT
ACTIVITY
DETECT
VSYNC0
VSYNC1
POLARITY
DETECT
ACTIVITY
DETECT
POLARITY
DETECT
ACTIVITY
DETECT
SYNC
SLICER
HSYNC/VSYNC
ACTIVITY
DETECT
SET POLARITY
H/V COUNT
R26, R27
Figure 8. Sync Processing Block Diagram
Sync Processing
The inputs of the sync processing section of the AD9981 are
combinations of digital Hsyncs and Vsyncs, analog sync-on-
green, or sync-on-Y signals, and an optional external Coast
signal. From these signals it generates a precise, jitter-free (9%
or less at 95 MHz) clock from its PLL; an odd-/even-field signal;
Hsync and Vsync out signals; a count of Hsyncs per Vsync; and
a programmable SOG output. The main sync processing blocks
are the sync slicer, sync separator, Hsync filter, Hsync
regenerator, Vsync filter, and Coast generator.
The sync slicer extracts the sync signal from the green graphics
or luminance video signal that is connected to the SOGIN input
and outputs a digital composite sync. The sync separator’s task
is to extract Vsync from the composite sync signal, which can
come from either the sync slicer or the Hsync input. The Hsync
filter is used to eliminate any extraneous pulses from the Hsync
or SOGIN inputs, outputting a clean, low-jitter signal that is
appropriate for mode detection and clock generation. The
Hsync regenerator is used to recreate a clean, although not low
jitter, Hsync signal that can be used for mode detection and
counting Hsyncs per Vsync. The Vsync filter is used to elimi-
nate spurious Vsyncs, maintain a stable timing relationship
between the Vsync and Hsync output signals, and generate the
odd/even field output. The Coast generator creates a robust
Coast signal that allows the PLL to maintain its frequency in the
absence of Hsync pulses.
Sync Slicer
The purpose of the sync slicer is to extract the sync signal from
the green graphics or luminance video signal that is connected
to the SOGIN input. The sync signal is extracted in a two step
process. First, the SOG input is clamped to its negative peak,
(typically 0.3 V below the black level). Next, the signal goes to a
comparator with a variable trigger level (set by Register 0x1D,
Bits [7:3]), but nominally 0.128 V above the clamped level. The
sync slicer output is a digital composite sync signal containing
both Hsync and Vsync information (see Figure 9).
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| AD9981KSTZ-95 | 功能描述:IC INTERFACE 10BIT ANALOG 80LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 专用 系列:- 特色产品:NXP - I2C Interface 标准包装:1 系列:- 应用:2 通道 I²C 多路复用器 接口:I²C，SM 总线 电源电压:2.3 V ~ 5.5 V 封装/外壳:16-TSSOP（0.173"，4.40mm 宽） 供应商设备封装:16-TSSOP 包装:剪切带 (CT) 安装类型:表面贴装 产品目录页面:825 (CN2011-ZH PDF) 其它名称:568-1854-1 |
| AD9981XSTZ-110 | 制造商:Analog Devices 功能描述:HIGH PERFORMANCE 10-BIT DISPLAY INTERFACE - Bulk |
| AD9983A | 制造商:AD 制造商全称:Analog Devices 功能描述:High Performance 8-Bit Display Interface |
| AD9983A/PCB | 制造商:AD 制造商全称:Analog Devices 功能描述:High Performance 8-Bit Display Interface |
| AD9983A/PCBZ | 功能描述:KIT EVALUATION AD9983A RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:Advantiv® 标准包装:1 系列:PCI Express® (PCIe) 主要目的:接口，收发器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要属性:- 次要属性:- 已供物品:板 |
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