参数资料
型号: AD9995KCPZ
厂商: Analog Devices Inc
文件页数: 39/60页
文件大小: 0K
描述: IC CCD SIGNAL PROCESSOR 56-LFCSP
标准包装: 1
类型: CCD 信号处理器,12 位
输入类型: 逻辑
输出类型: 逻辑
接口: 3 线串口
电流 - 电源: 30mA
安装类型: 表面贴装
封装/外壳: 56-VFQFN 裸露焊盘,CSP
供应商设备封装: 56-LFCSP-VQ(8x8)
包装: 托盘
AD9995
–44–
Table XXVII.V-Pattern Group 1 (VPAT1) Register Map (continued)
Data Bit Default
Address Content Value
Register Name
Description
13
[11:0]
0
V5TOG1_1
V5 Toggle Position 1
[23:12]
0
V5TOG2_1
V5 Toggle Position 2
14
[11:0]
0
V5TOG3_1
V5 Toggle Position 3
[23:12]
0
V6TOG1_1
V6 Toggle Position 1
15
[11:0]
0
V6TOG2_1
V6 Toggle Position 2
[23:12]
0
V6TOG3_1
V6 Toggle Position 3
16
[11:0]
0
FREEZE1_1
V1–V6 Freeze Position 1
[23:12]
0
RESUME1_1
V1–V6 Resume Position 1
17
[11:0]
0
FREEZE2_1
V1–V6 Freeze Position 2
[23:12]
0
RESUME2_1
V1–V6 Resume Position 2
Table XXVIII.V-Pattern Group 2 (VPAT2) Register Map
Data Bit Default
Address Content Value
Register Name
Description
18
[5:0]
0
VPOL_2
VPAT2 Start Polarity. V1[0]. V2[1]. V3[2]. V4[3]. V5[4]. V6[5].
[11:6]
0
UNUSED
Unused.
[23:12]
0
VPATLEN_2
Total Length of VPAT2. Note: If using VPAT2 as a second V-sequence in
the VSG active line, this value is the start position for the second V-sequence.
19
[11:0]
0
V1TOG1_2
V1 Toggle Position 1
[23:12]
0
V1TOG2_2
V1 Toggle Position 2
1A
[11:0]
0
V1TOG3_2
V1 Toggle Position 3
[23:12]
0
V2TOG1_2
V2 Toggle Position 1
1B
[11:0]
0
V2TOG2_2
V2 Toggle Position 2
[23:12]
0
V2TOG3_2
V2 Toggle Position 3
1C
[11:0]
0
V3TOG1_2
V3 Toggle Position 1
[23:12]
0
V3TOG2_2
V3 Toggle Position 2
1D
[11:0]
0
V3TOG3_2
V3 Toggle Position 3
[23:12]
0
V4TOG1_2
V4 Toggle Position 1
1E
[11:0]
0
V4TOG2_2
V4 Toggle Position 2
[23:12]
0
V4TOG3_2
V4 Toggle Position 3
1F
[11:0]
0
V5TOG1_2
V5 Toggle Position 1
[23:12]
0
V5TOG2_2
V5 Toggle Position 2
20
[11:0]
0
V5TOG3_2
V5 Toggle Position 3
[23:12]
0
V6TOG1_2
V6 Toggle Position 1
21
[11:0]
0
V6TOG2_2
V6 Toggle Position 2
[23:12]
0
V6TOG3_2
V6 Toggle Position 3
22
[11:0]
0
FREEZE1_2
V1–V6 Freeze Position 1
[23:12]
0
RESUME1_2
V1–V6 Resume Position 1
23
[11:0]
0
FREEZE2_2
V1–V6 Freeze Position 2
[23:12]
0
RESUME2_2
V1–V6 Resume Position 2
Table XXIX.V-Pattern Group 3 (VPAT3) Register Map
Data Bit Default
Address Content Value
Register Name
Description
24
[5:0]
0
VPOL_3
VPAT3 Start Polarity. V1[0]. V2[1]. V3[2]. V4[3]. V5[4]. V6[5].
[11:6]
0
UNUSED
Unused.
[23:12]
0
VPATLEN_3
Total Length of VPAT3. Note: If using VPAT3 as a second V-sequence in
the VSG active line, this value is the start position for the second V-sequence.
25
[11:0]
0
V1TOG1_3
V1 Toggle Position 1
[23:12]
0
V1TOG2_3
V1 Toggle Position 2
REV. 0
OBSOLETE
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