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参数资料
| 型号： | ADE5166ASTZF62-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 71/156页 |
| 文件大小： | 0K |
| 描述： | IC METER/8052/RTC/LCD DRV 64LQFP |
| 产品变化通告： | Product Discontinuance 27/Oct/2011 |
| 标准包装： | 1,500 |
| 输入阻抗： | * |
| 测量误差： | * |
| 电压 - 高输入/输出： | * |
| 电压 - 低输入/输出： | * |
| 电流 - 电源： | * |
| 电源电压： | * |
| 测量仪表类型： | * |
| 工作温度： | * |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 带卷 (TR) |
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× 1 . 22 μ s = 199 sec = 3 . 33 min
0xFFFF, FFFF, FFFF
DataSheet
Figure 77 shows this discrete time integration or accumulation.
The apparent power signal is continuously added to the internal
register. This addition is a signed addition even if the apparent
energy theoretically remains positive.
The 49 bits of the internal register are divided by VADIV. If the
value in the VADIV register (Address 0x26) is 0, the internal
apparent energy register is divided by 1. VADIV is an 8-bit,
unsigned register. The upper 24 bits are then written to the 24-bit
apparent energy register (VAHR, Address 0x07[23:0]). The
RVAHR register (Address 0x08), which is 24 bits long, is provided
to read the apparent energy. This register is reset to 0 after a read
operation.
Note that the apparent energy register is unsigned. By setting
VAEHF (Bit 2) and VAEOF (Bit 5) in the Interrupt Enable 2 SFR
(MIRQENM, Address 0xDA), the ADE5166/ADE5169/ADE5566/
ADE5569 can be configured to issue an ADE interrupt to the 8052
core when the apparent energy register is half full or when an over-
flow occurs. The half-full interrupt for the unsigned apparent
energy register is based on 24 bits, as opposed to 23 bits for the
signed active energy register.
Integration Times Under Steady Load—Apparent Energy
As mentioned in the Apparent Energy Calculation section, the
discrete time sample period (T) for the accumulation register is
ADE5166/ADE5169/ADE5566/ADE5569
the average word value from the apparent power stage is 0x1A36E2
(see the Apparent Energy Calculation section). The maximum
value that can be stored in the apparent energy register before it
over-flows is 2 24 or 0xFF FFFF. The average word value is added
to the internal register, which can store 2 48 or 0xFFFF FFFF FFFF
before it overflows. Therefore, the integration time under these
conditions, with VADIV = 0, is calculated as follows:
Time =
(33)
0xD055
When VADIV is set to a value other than 0, the integration time
varies, as shown in Equation 34.
Time = Time VADIV = 0 × VADIV (34)
Apparent Energy Pulse Output
All the ADE5166/ADE5169/ADE5566/ADE5569 circuitry has
a pulse output whose frequency is proportional to the apparent
power (see the Energy-to-Frequency Conversion section). This
pulse frequency output uses the calibrated signal from the
VAGAIN register. This output can also be used to output a pulse
whose frequency is proportional to I rms .
The pulse output is active low and should preferably be connected
to an LED, as shown in Figure 80.
1.22 μs (5/MCLK). With full-scale sinusoidal signals on the analog
inputs and the VAGAIN register (Address 0x1F) set to 0x000,
VAHR[23:0]
23
48
VADIV
%
0
0
APPARENT POWER
or
I rms
+
+
48
0
T
APPARENT
POWER SIGNAL = P
APPARENT POWER OR I rms IS
ACCUMULATED (INTEGRATED)
IN THE APPARENT ENERGY
REGISTER
TIME (nT)
Figure 77. Apparent Energy Calculation
Rev. D | Page 71 of 156
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| ADE5169 | 制造商:AD 制造商全称:Analog Devices 功能描述:Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver |
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| ADE5566 | 制造商:AD 制造商全称:Analog Devices 功能描述:Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver |
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