参数资料
型号: ADE5166ASTZF62-RL
厂商: Analog Devices Inc
文件页数: 92/156页
文件大小: 0K
描述: IC METER/8052/RTC/LCD DRV 64LQFP
产品变化通告: Product Discontinuance 27/Oct/2011
标准包装: 1,500
输入阻抗: *
测量误差: *
电压 - 高输入/输出: *
电压 - 低输入/输出: *
电流 - 电源: *
电源电压: *
测量仪表类型: *
工作温度: *
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 带卷 (TR)

ADE5166/ADE5169/ADE5566/ADE5569
DUAL DATA POINTERS
Each ADE5166/ADE5169/ADE5566/ADE5569 incorporates
two data pointers. The second data pointer is a shadow data
pointer and is selected via the data pointer control SFR (DPCON,
Address 0xA7). DPCON features automatic hardware post-
increment and postdecrement, as well as an automatic data
pointer toggle.
Note that this is the only section of the data sheet where the
main and shadow data pointers are distinguished. Whenever the
data pointer (DPTR) is mentioned elsewhere in the data sheet,
Data Sheet
To illustrate the operation of DPCON, the following code copies
256 bytes of code memory at Address 0xD000 into XRAM,
starting from Address 0x0000:
MOV DPTR,#0 ;Main DPTR = 0
MOV DPCON,#55H ;Select shadow DPTR
;DPTR1 increment mode
;DPTR0 increment mode
;DPTR auto toggling ON
active DPTR is implied.
In addition, only the MOVC/MOVX @DPTR instructions
automatically postincrement and postdecrement the DPTR.
MOV DPTR,#0D000H
MOVELOOP: CLR A
MOVC A,@A+DPTR
;DPTR = D000H
;Get data
Other MOVC/MOVX instructions, such as MOVC PC
or MOVC @Ri, do not cause the DPTR to automatically
;Post Inc DPTR
;Swap to Main DPTR(Data)
postincrement and postdecrement.
MOVX @DPTR,A
;Put ACC in XRAM
;Increment main DPTR
;Swap Shadow DPTR(Code)
MOV A, DPL
JNZ MOVELOOP
Table 79. Data Pointer Control SFR (DPCON, Address 0xA7)
Bit
7
6
Mnemonic
DPT
Default
0
0
Description
Not implemented. Write don’t care.
Data pointer automatic toggle enable. Cleared by the user to disable autoswapping of the DPTR.
Set in user software to enable automatic toggling of the DPTR after each MOVX or MOVC instruction.
[5:4]
DP1m1,
DP1m0
0
Shadow data pointer mode. These bits enable extra modes of the shadow data pointer operation,
allowing more compact and more efficient code size and execution.
DP1m1
DP1m0
Result (Behavior of the Shadow Data Pointer)
0
0
8052 behavior.
0
1
DPTR is postincremented after a MOVX or MOVC instruction.
1
0
DPTR is postdecremented after a MOVX or MOVC instruction.
1
1
DPTR LSB is toggled after a MOVX or MOVC instruction. This instruction can be
useful for moving 8-bit blocks to/from 16-bit devices.
[3:2]
DP0m1,
DP0m0
0
Main data pointer mode. These bits enable extra modes of the main data pointer operation, allowing
more compact and more efficient code size and execution.
DP0m1
DP0m0
Result (Behavior of the Main Data Pointer)
0
0
8052 behavior.
0
1
DPTR is postincremented after a MOVX or MOVC instruction.
1
0
DPTR is postdecremented after a MOVX or MOVC instruction.
1
1
DPTR LSB is toggled after a MOVX or MOVC instruction. This instruction is useful
for moving 8-bit blocks to/from 16-bit devices.
1
0
Not implemented. Write don’t care.
0
DPSEL
0
Data pointer select. Cleared by the user to select the main data pointer, meaning that the contents of
this 16-bit register are placed into the DPL SFR and DPH SFR. Set by the user to select the shadow data
pointer, meaning that the contents of a separate 16-bit register appear in the DPL SFR and DPH SFR.
Rev. D | Page 92 of 156
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