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参数资料
| 型号： | ADE7518ASTZF16 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 121/128页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METER MCU 16K 64LQFP |
| 产品变化通告： | Product Discontinuance 27/Oct/2011 |
| 特色产品： | ADE7518: Single-phase Energy-Measurement IC |
| 标准包装： | 160 |
| 输入阻抗： | * |
| 测量误差： | * |
| 电压 - 高输入/输出： | * |
| 电压 - 低输入/输出： | * |
| 电流 - 电源： | * |
| 电源电压： | * |
| 测量仪表类型： | * |
| 工作温度： | * |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 托盘 |
| 产品目录页面： | 797 (CN2011-ZH PDF) |
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ADE7518
I/O PORTS
PARALLEL I/O
The ADE7518 uses three input/output ports to exchange data
with external devices. In addition to performing general-purpose
I/O, some are capable of driving an LCD or performing alternate
functions for the peripherals available on-chip. In general, when a
peripheral is enabled, the pins associated with it cannot be used as
a general-purpose I/O. The I/O port can be configured through
the SFRs listed in Table 136.
Table 136. I/O Port SFRs
Weak Internal Pull-Ups Enabled
A pin with weak internal pull-up enabled is used as an input by
writing a 1 to the pin. The pin is pulled high by the internal pull-
ups, and the pin is read using the circuitry shown in Figure 101.
If the pin is driven low externally, it sources current because of
the internal pull-ups.
A pin with internal pull-up enabled is used as an output by
writing a 1 or a 0 to the pin to control the level of the output.
If a 0 is written to the pin, it drives a logic low output voltage
(V OL ) and is capable of sinking 1.6 mA.
SFR
P0
P1
P2
EPCFG
Address
0x80
0x90
0xA0
0x9F
Bit Addressable
Yes
Yes
Yes
No
Description
Port 0.
Port 1.
Port 2.
Extended Port
Open Drain (Weak Internal Pull-Ups Disabled)
When the weak internal pull-up on a pin is disabled, the pin
becomes open drain. Use this open-drain pin as a high impedance
input by writing a 1 to the pin. The pin is read using the circuitry
Configuration.
shown in Figure 101. The open-drain option is preferable for
PINMAP0
0xB2
No
Port 0 Weak
inputs because it draws less current than the internal pull-ups
Pull-Up Enable.
that were enabled.
PINMAP1
PINMAP2
0xB3
0xB4
No
No
Port 1 Weak
Pull-Up Enable.
Port 2 Weak
38 kHz Modulation
The ADE7518 provides a 38 kHz modulation signal. The
Pull-Up Enable.
The three bidirectional I/O ports have internal pull-ups that can
be enabled or disabled individually for each pin. The internal
pull-ups are enabled by default. Disabling an internal pull-up
causes a pin to become open drain. Weak internal pull-ups are
configured through the PINMAPx SFRs.
Figure 101 shows a typical bit latch and I/O buffer for an I/O pin.
The bit latch (one bit in each port’s SFR) is represented as a
Type D flip-flop, which clocks in a value from the internal bus
in response to a write-to-latch signal from the CPU. The Q output
of the flip-flop is placed on the internal bus in response to a read
latch signal from the CPU. The level of the port pin itself is
placed on the internal bus in response to a read pin signal from
the CPU. Some instructions that read a port activate the read
latch signal, and others activate the read pin signal. See the
Read-Modify-Write Instructions section for details.
DV DD
38 kHz modulation is accomplished by internally XOR’ing the
level written to the I/O pin with a 38 kHz square wave. Then,
when a 0 is written to the I/O pin, it is modulated as shown in
Figure 102.
LEVEL WRITTEN
TO MOD38
38kHz MODULATION
SIGNAL
38kHz MODULATED
OUTPUT PIN
Figure 102. 38 kHz Modulation
Uses for this 38 kHz modulation include IR modulation of
a UART transmit signal or a low power signal to drive an
LED. The modulation can be enabled or disabled with the
MOD38EN bit in the CFG SFR. The 38 kHz modulation is
available on eight pins, selected by the MOD38[7:0] bits in
the Extended Port Configuration SFR (EPCFG, 0x9F).
READ
LATCH
ALTERNATE
OUTPUT
FUNCTION
INTERNAL
PULL-UP
CLOSED: PINMAPx.x = 0
OPEN: PINMAPx.x = 1
INTERNAL
BUS
D
Q
Px.x
PIN
WRITE
TO LATCH
READ
PIN
CL Q
LATCH
ALTERNATE
INPUT
FUNCTION
Figure 101. Port 0 Bit Latch and I/O Buffer
Rev. 0 | Page 121 of 128
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