- 您现在的位置：买卖IC网 > PDF目录4596 > ADE7518ASTZF16 (Analog Devices Inc)IC ENERGY METER MCU 16K 64LQFP PDF资料下载
参数资料
| 型号： | ADE7518ASTZF16 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 74/128页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METER MCU 16K 64LQFP |
| 产品变化通告： | Product Discontinuance 27/Oct/2011 |
| 特色产品： | ADE7518: Single-phase Energy-Measurement IC |
| 标准包装： | 160 |
| 输入阻抗： | * |
| 测量误差： | * |
| 电压 - 高输入/输出： | * |
| 电压 - 低输入/输出： | * |
| 电流 - 电源： | * |
| 电源电压： | * |
| 测量仪表类型： | * |
| 工作温度： | * |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 托盘 |
| 产品目录页面： | 797 (CN2011-ZH PDF) |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页当前第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页
ADE7518
INTERRUPT SYSTEM
PSM
The unique power management architecture of the ADE7518
includes an operating mode (PSM2) where the 8052 MCU core
is shut down. Events can be configured to wake the 8052 MCU
core from the PSM2 operating mode. A distinction is drawn
here between events that can trigger the wake-up of the 8052
MCU core and events that can trigger an interrupt when the
MCU core is active. Events that can wake the core are referred
to as wake-up events, whereas events that can interrupt the
program flow when the MCU is active are called interrupts.
See the 3.3 V Peripherals and Wake-Up Events section to learn
more about events that can wake the 8052 core from PSM2.
The ADE7518 provides 12 interrupt sources with three priority
levels. The power management interrupt is at the highest priority
level. The other two priority levels are configurable through the
Interrupt Priority SFR (IP, 0xB8) and the Interrupt Enable and
Priority 2 SFR (IEIP2, 0xA9).
occur at the same time, the Priority 1 interrupt is serviced first.
An interrupt cannot be interrupted by another interrupt of the
same priority level. If two interrupts of the same priority level
occur simultaneously, a polling sequence is observed (see the
Interrupt Priority section).
INTERRUPT ARCHITECTURE
The ADE7518 possesses advanced power supply managment
features. To ensure a fast response to time-critical power supply
issues, such as a loss of line power, the power supply managment
interrupt should be able to interrupt any interrupt service routine.
To enable the user to have full use of the standard 8052 interrupt
priority levels, an additional priority level is added for the power
supply management (PSM) interrupt. The PSM interrupt is the
only interrupt at this highest interrupt priority level.
HIGH
STANDARD 8052 INTERRUPT ARCHITECTURE
The 8052 standard interrupt architecture includes two tiers of
LOW
PRIORITY 1
PRIORITY 0
interrupts, where some interrupts are assigned a high priority
and others are assigned a low priority.
Figure 74. Interrupt Architecture
See the Power Supply Management (PSM) Interrupt section for
HIGH
LOW
PRIORITY 1
PRIORITY 0
more information on the PSM interrupt.
INTERRUPT REGISTERS
Figure 73. Standard 8052 Interrupt Priority Levels
A Priority 1 interrupt can interrupt the service routine of a
Priority 0 interrupt, and if two interrupts of different priorities
Table 57. Interrupt SFRs
The control and configuration of the interrupt system is carried
out through four interrupt-related SFRs discussed in this section.
SFR
IE
IP
IEIP2
WDCON
Address
0xA8
0xB8
0xA9
0xC0
Default
0x00
0x00
0xA0
0x10
Bit Addressable
Yes
Yes
No
Yes
Description
Interrupt Enable (see Table 58).
Interrupt Priority (see Table 59).
Interrupt Enable and Priority 2 (see Table 60).
Watchdog Timer (see Table 65 and the Writing to the Watchdog Timer SFR
(WDCON, 0xC0) section).
Table 58. Interrupt Enable SFR (IE , 0xA8)
Bit
7
6
5
4
3
2
1
0
Address
0xAF
0xAE
0xAD
0xAC
0xAB
0xAA
0xA9
0xA8
Mnemonic
EA
Reserved
ET2
ES
ET1
EX1
ET0
EX0
Description
Enables All Interrupt Sources. Set by the user. Cleared by the user to disable all interrupt sources.
This bit should be left cleared for proper operation.
Enables the Timer 2 Interrupt. Set by the user.
Enables the UART Serial Port Interrupt. Set by the user.
Enables the Timer 1 Interrupt. Set by the user.
Enables the External Interrupt 1 (INT1). Set by the user.
Enables the Timer 0 Interrupt. Set by the user.
Enables External Interrupt 0 (INT0). Set by the user.
Rev. 0 | Page 74 of 128
相关PDF资料 |
PDF描述 |
|---|---|
| ADE7156ASTZF8 | IC ENERGY METER 64-LQFP |
| ADE7156ASTZF16-RL | IC ENERGY METER 64-LQFP |
| ADE7116ASTZF8-RL | IC ENERGY METER 64-LQFP |
| ADE7116ASTZF8 | IC ENERGY METER 64-LQFP |
| ADE5166ASTZF62-RL | IC METER/8052/RTC/LCD DRV 64LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| ADE7518ASTZF16-RL | 功能描述:IC ENERGY METER MCU 16K 64LQFP RoHS:是 类别:集成电路 (IC) >> PMIC - 能量测量 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:* |
| ADE7518ASTZF8 | 功能描述:IC ENERGY METER MCU 8K 64LQFP RoHS:是 类别:集成电路 (IC) >> PMIC - 能量测量 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:* |
| ADE7518ASTZF8-RL | 功能描述:IC ENERGY METER MCU 8K 64LQFP RoHS:是 类别:集成电路 (IC) >> PMIC - 能量测量 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:* |
| ADE7566 | 制造商:AD 制造商全称:Analog Devices 功能描述:Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver |
| ADE7566ACPZF16 | 制造商:AD 制造商全称:Analog Devices 功能描述:Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver |
发布紧急采购，3分钟左右您将得到回复。