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| 型号： | ADE7763ARSZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 29/56页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METERING 1PHASE 20SSOP |
| 标准包装： | 66 |
| 输入阻抗： | 390 千欧 |
| 测量误差： | 0.1% |
| 电压 - 高输入/输出： | 2.4V |
| 电压 - 低输入/输出： | 0.8V |
| 电流 - 电源： | 3mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 测量仪表类型： | 单相 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 20-SSOP |
| 包装： | 管件 |
| 产品目录页面： | 797 (CN2011-ZH PDF) |
| 配用： | EVAL-ADE7763ZEB-ND - BOARD EVALUATION FOR ADE7763 |
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Data Sheet
Integration Time under Steady Load
As mentioned in the last section, the discrete time sample
period ( T ) for the accumulation register is 1.1 μs (4/CLKIN).
With full-scale sinusoidal signals on the analog inputs and the
WGAIN register set to 0x000, the average word value from each
LPF2 is 0xC CCCD—see Figure 53. The maximum positive
value that can be stored in the internal 49-bit register before it
overflows is 2 48 , or 0xFFFF FFFF FFFF. The integration time
under these conditions with WDIV = 0 is calculated as follows:
ADE7763
A digital-to-frequency converter (DFC) is used to generate the
CF pulsed output. The DFC generates a pulse each time 1 LSB
in the active energy register is accumulated. An output pulse is
generated when (CFDEN + 1)/(CFNUM + 1) number of pulses
are generated at the DFC output. Under steady load conditions,
the output frequency is proportional to the active power.
The maximum output frequency, with ac input signals at full
scale, CFNUM = 0x00, and CFDEN = 0x00, is approximately
23 kHz.
× 1 . 12 μ s = 375 . 8 s = 6 . 26 min
Time =
0xFFFF FFFF FFFF
0xC CCCD
When WDIV is set to a value other than 0, the integration time
varies, as shown in Equation 16.
Time = Time WDIV = 0 × WDIV (16)
POWER OFFSET CALIBRATION
The ADE7763 incorporates an active power offset register
(APOS[15:0]). This is a signed, twos complement, 16-bit
register that can be used to remove offsets in the active power
calculation—see Figure 57. An offset could exist in the power
calculation due to crosstalk between channels on the PCB or in
the IC itself.
The 256 LSBs (APOS = 0x0100) written to the active power
offset register are equivalent to 1 LSB in the waveform sample
register. Assuming the average value output from LPF2 is
0xC CCCD (838,861d) when inputs on Channels 1 and 2 are
both at full scale. At ?60 dB down on Channel 1 (1/1000 of the
Channel 1 full-scale input), the average word value output from
LPF2 is 838.861 (838,861/1,000). One LSB in the LPF2 output
has a measurement error of 1/838.861 × 100% = 0.119% of the
average value. The active power offset register has a resolution
equal to 1/256 LSB of the waveform register; therefore, the
power offset correction resolution is 0.00047%/LSB
(0.119%/256) at –60 dB.
ENERGY-TO-FREQUENCY CONVERSION
(15)
There are two unsigned, 12-bit registers, CFNUM[11:0] and
CFDEN[11:0], that can be used to set the CF frequency to a wide
range of values. These frequency-scaling registers are 12-bit
registers that can scale the output frequency by 1/2 12 to 1 with a
step of 1/2 12 .
If the value 0 is written to any of these registers, the value 1 will
be applied to the register. The ratio (CFNUM + 1)/(CFDEN + 1)
should be smaller than 1 to ensure proper operation. If the ratio
of the registers (CFNUM + 1)/(CFDEN + 1) is greater than 1, the
register values will be adjusted to a ratio (CFNUM + 1)/
(CFDEN + 1) of 1. For example, if the output frequency is
1.562 kHz while the contents of CFDEN are 0 (0x000), then the
output frequency can be set to 6.1 Hz by writing 0xFF to the
CFDEN register.
When CFNUM and CFDEN are both set to one, the CF pulse
width is fixed at 16 CLKIN/4 clock cycles, approximately 18 μs
with a CLKIN of 3.579545 MHz. If the CF pulse output is longer
than 180 ms for an active energy frequency of less than 5.56 Hz,
the pulse width is fixed at 90 ms. Otherwise, the pulse width is
50% of the duty cycle.
The output frequency has a slight ripple at a frequency equal to
twice the line frequency. This is due to imperfect filtering of the
instantaneous power signal to generate the active power signal—
see the Active Power Calculation section. Equation 8 gives an
expression for the instantaneous power signal. This is filtered by
LPF2, which has a magnitude response given by Equation 17.
1 +
The ADE7763 provides energy-to-frequency conversion for
calibration purposes. After initial calibration at manufacturing,
the manufacturer or end customer often verifies the energy meter
calibration. One convenient way to verify the meter calibration
H ( f ) =
1
f 2
8 . 9 2
(17)
is for the manufacturer to provide an output frequency, which is
proportional to the energy or active power under steady load
conditions. This output frequency can provide a simple, single-
wire, optically isolated interface to external calibration equip-
ment. Figure 59 illustrates the energy-to-frequency conversion.
CFNUM[11:0]
11
0
48
AENERGY[48:0]
0
DFC
11
%
0
CF
CFDEN[11:0]
Figure 59. Energy-to-Frequency Conversion
Rev. C | Page 29 of 56
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相关代理商/技术参数 |
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|---|---|
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| ADE7763ARSZRL | 功能描述:IC ENERGY METERING 1PHASE 20SSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 能量测量 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:* |
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| ADE7768 | 制造商:AD 制造商全称:Analog Devices 功能描述:Energy Metering IC with Integrated Oscillator and Positive Power Accumulation |
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