参数资料
型号: ADE7763ARSZ
厂商: Analog Devices Inc
文件页数: 32/56页
文件大小: 0K
描述: IC ENERGY METERING 1PHASE 20SSOP
标准包装: 66
输入阻抗: 390 千欧
测量误差: 0.1%
电压 - 高输入/输出: 2.4V
电压 - 低输入/输出: 0.8V
电流 - 电源: 3mA
电源电压: 4.75 V ~ 5.25 V
测量仪表类型: 单相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-SSOP(0.209",5.30mm 宽)
供应商设备封装: 20-SSOP
包装: 管件
产品目录页面: 797 (CN2011-ZH PDF)
配用: EVAL-ADE7763ZEB-ND - BOARD EVALUATION FOR ADE7763
ADE7763
APPARENT POWER CALCULATION
The apparent power is the maximum power that can be
delivered to a load. V rms and I rms are the effective voltage and
current delivered to the load; the apparent power (AP) is
defined as V rms × I rms . The angle θ between the active power and
Data Sheet
The gain of the apparent energy can be adjusted by using the
multiplier and VAGAIN register (VAGAIN[11:0]). The gain is
adjusted by writing a twos complement, 12-bit word to the
VAGAIN register. Equation 25 shows how the gain adjustment
is related to the contents of the VAGAIN register.
OutputVAGA IN ? ? ? Apparent Power ? ? 1 ?
? ? ? (25)
the apparent power generally represents the phase shift due to
nonresistive loads. For single-phase applications, θ represents
the angle between the voltage and the current signals—see
? ?
? ?
VAGAIN ? ?
2 12 ? ?
Figure 63. Equation 24 gives an expression of the instantaneous
power signal in an ac system with a phase shift.
APPARENT POWER
REACTIVE
POWER
?
ACTIVE POWER
Figure 63. Power Triangle
For example, when 0x7FF is written to the VAGAIN register, the
power output is scaled up by 50%. 0x7FF = 2047d, 2047/2 12 = 0.5.
Similarly, 0x800 = –2047d (signed, twos complement) and power
output is scaled by –50%. Each LSB represents 0.0244% of the
power output. The apparent power is calculated with the current
and voltage rms values obtained in the rms blocks of the
ADE7763. Figure 65 shows the maximum code (hexadecimal)
output range of the apparent power signal. Note that the output
range changes depending on the contents of the apparent power
gain registers. The minimum output range is given when the
apparent power gain register content is equal to 0x800; the
v ( t ) ? 2 V rms sin( ? t )
i ( t ) ? 2 I rms sin( ? t ? ? )
p ( t ) ? v ( t ) ? i ( t )
p ( t ) ? V rms I rms cos( ? ) ? V rms I rms cos( 2 ? t ? ? )
(23)
(24)
maximum range is given by writing 0x7FF to the apparent
power gain register. This can be used to calibrate the apparent
power (or energy) calculation in the ADE7763.
APPARENT POWER 100% FS
APPARENT POWER 150% FS
APPARENT POWER 50% FS
The apparent power is defined as V rms × I rms . This expression is
independent from the phase angle between the current and
the voltage.
Figure 64 illustrates the signal processing in each phase for the
0x10 3880
0xA D055
0x5 682B
0x0 0000
0x000
0x7FF
0x800
calculation of the apparent power in the ADE7763.
{VAGAIN[11:0]}
I RMS
APPARENT POWER
SIGNAL (P)
APPARENT POWER
CALIBRATION RANGE,
VOLTAGE AND CURRENT
CURRENT RMS SIGNAL – i(t)
0x1C 82B3
0x00
V RMS
MULTIPLIER
VAGAIN
0xA D055
CHANNEL INPUTS: 0.5V/GAIN
Figure 65. Apparent Power Calculation Output Range
Apparent Power Offset Calibration
Each rms measurement includes an offset compensation
VOLTAGE RMS SIGNAL – v(t)
0x17 D338
0x00
Figure 64. Apparent Power Signal Processing
register to calibrate and eliminate the dc component in the rms
value—see the Channel 1 RMS Calculation and Channel 2 RMS
Calculation sections. The Channel 1 and Channel 2 rms values
are then multiplied together in the apparent power signal
processing. Because no additional offsets are created in the
multiplication of the rms values, there is no specific offset
compensation in the apparent power signal processing. The
offset compensation of the apparent power measurement is
done by calibrating each individual rms measurement.
Rev. C | Page 32 of 56
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