参数资料
型号: ADE7763ARSZ
厂商: Analog Devices Inc
文件页数: 33/56页
文件大小: 0K
描述: IC ENERGY METERING 1PHASE 20SSOP
标准包装: 66
输入阻抗: 390 千欧
测量误差: 0.1%
电压 - 高输入/输出: 2.4V
电压 - 低输入/输出: 0.8V
电流 - 电源: 3mA
电源电压: 4.75 V ~ 5.25 V
测量仪表类型: 单相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 20-SSOP(0.209",5.30mm 宽)
供应商设备封装: 20-SSOP
包装: 管件
产品目录页面: 797 (CN2011-ZH PDF)
配用: EVAL-ADE7763ZEB-ND - BOARD EVALUATION FOR ADE7763
Data Sheet
ADE7763
APPARENT ENERGY CALCULATION
23
VAENERGY[23:0]
0
The apparent energy is given as the integral of the
apparent power.
?
Apparent Energy ? Apparent Power ( t ) dt
(26)
48
0
The ADE7763 achieves the integration of the apparent power
signal by continuously accumulating the apparent power signal
in an internal 49-bit register. The apparent energy register
VADIV
%
?
? ? ?
T ? 0 ?
? ?
(VAENERGY[23:0]) represents the upper 24 bits of this internal
register. This discrete time accumulation or summation is
equivalent to integration in continuous time. Equation 29
expresses this relationship.
Apparent Energy ? Lim ?
Apparent Power ( nT ) ? T ? (27)
??
? n ? 0
APPARENT
POWER
T
+
+
48
ACTIVE POWER
SIGNAL = P
0
APPARENT POWER IS
ACCUMULATED (INTEGRATED) IN
THE APPARENT ENERGY REGISTER
where:
n is the discrete number of time samples.
T is the time sample period.
The discrete time sample period ( T ) for the accumulation
register is 1.1 μs (4/CLKIN).
Figure 66 shows this discrete time integration or accumulation.
TIME (nT)
Figure 66. Apparent Energy Calculation
VAENERGY[23:0]
The apparent power signal is continuously added to the internal
register. This addition is a signed addition, even if the apparent
energy always remains positive in theory.
The 49 bits of the internal register are divided by VADIV. If the
value in the VADIV register is 0, then the internal active energy
register is divided by 1. VADIV is an 8-bit, unsigned register.
The upper 24 bits are then written in the 24-bit apparent energy
register (VAENERGY[23:0]). RVAENERGY register (24 bits
long) is provided to read the apparent energy. This register is
reset to 0 after a read operation.
0xFF FFFF
0x80 0000
0x40 0000
0x20 0000
VAGAIN = 0x7FF
VAGAIN = 0x000
VAGAIN = 0x800
Figure 67 shows this apparent energy accumulation for full-
0x00 0000
6.26
12.52
18.78
25.04
TIME
(minutes)
scale signals (sinusoidal) on the analog inputs. The three curves
illustrate the minimum time for the energy register to roll over
when the VAGAIN registers content is equal to 0x7FF, 0x000,
and 0x800. The VAGAIN register is used to carry out an
apparent power calibration. As shown in the figure, the fastest
integration time occurs when the VAGAIN register is set to
maximum full scale, i.e., 0x7FF.
Figure 67. Energy Register Rollover Time for Full-Scale Power
(Maximum and Minimum Power Gain)
Note that the apparent energy register is unsigned—see Figure
67. By using the interrupt enable register, the ADE7763 can be
configured to issue an interrupt (IRQ) when the apparent energy
register is more than half full or when an overflow occurs. The
half full interrupt for the unsigned apparent energy register is
based on 24 bits, as opposed to 23 bits for the signed active
energy register.
Rev. C | Page 33 of 56
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