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参数资料
| 型号： | ADE7763ARSZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 49/56页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METERING 1PHASE 20SSOP |
| 标准包装： | 66 |
| 输入阻抗： | 390 千欧 |
| 测量误差： | 0.1% |
| 电压 - 高输入/输出： | 2.4V |
| 电压 - 低输入/输出： | 0.8V |
| 电流 - 电源： | 3mA |
| 电源电压： | 4.75 V ~ 5.25 V |
| 测量仪表类型： | 单相 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-SSOP（0.209"，5.30mm 宽） |
| 供应商设备封装： | 20-SSOP |
| 包装： | 管件 |
| 产品目录页面： | 797 (CN2011-ZH PDF) |
| 配用： | EVAL-ADE7763ZEB-ND - BOARD EVALUATION FOR ADE7763 |
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Data Sheet
ADE7763
Address
0x11
Name
APOS
R/W
R/W
No. Bits
16
Default
0x0
Type 1
S
Description
Active Power Offset Correction. This 16-bit register allows small offsets in
Calculation section.
0x12
WGAIN
R/W
12
0x0
S
Power Gain Adjust. This is a 12-bit register. Calibrate the active power
calculation by writing to this register. The calibration range is ±50% of the
nominal full-scale active power. The resolution of the gain adjust is
0.0244%/LSB —see the Calibrating an Energy Meter section.
0x13
WDIV
R/W
8
0x0
U
Active Energy Divider Register. The internal active energy register is
divided by the value of this register before being stored in the AENERGY
register.
0x14
CFNUM
R/W
12
0x3F
U
CF Frequency Divider Numerator Register. Adjust the output frequency
on the CF pin by writing to this 12-bit read/write register—see the
Energy-to-Frequency Conversion section.
0x15
CFDEN
R/W
12
0x3F
U
CF Frequency Divider Denominator Register. Adjust the output frequency
on the CF pin by writing to this 12-bit read/write register—see the
Energy-to-Frequency Conversion section.
0x16
0x17
0x18
IRMS
VRMS
IRMSOS
R
R
R/W
24
24
12
0x0
0x0
0x0
U
U
S
Channel 1 RMS Value (Current Channel).
Channel 2 RMS Value (Voltage Channel).
Channel 1 RMS Offset Correction Register. Note that for correct operation
only positive values should be written to the IRMSOS register.
0x19
0x1A
VRMSOS
VAGAIN
R/W
R/W
12
12
0x0
0x0
S
S
Channel 2 RMS Offset Correction Register.
Apparent Gain Register. Calibrate the apparent power calculation by
writing to this register. The calibration range is 50% of the nominal full-
scale real power. The resolution of the gain adjust is 0.02444%/LSB.
0x1B
VADIV
R/W
8
0x0
U
Apparent Energy Divider Register. The internal apparent energy register
is divided by the value of this register before being stored in the
VAENERGY register.
0x1C
LINECYC
R/W
16
0xFFFF
U
Line Cycle Energy Accumulation Mode Line-Cycle Register. This 16-bit
register is used during line cycle energy accumulation mode to set the
0x1D
ZXTOUT
R/W
12
0xFFF
U
Zero-Crossing Timeout. If no zero crossings are detected on Channel 2
within the time specified in this 12-bit register, the interrupt request line
(IRQ) will be activated—see the Zero-Crossing Detection section.
0x1E
SAGCYC
R/W
8
0xFF
U
Sag Line Cycle Register. This 8-bit register specifies the number of
consecutive line cycles below SAGLVL that is required on Channel 2
section.
0x1F
SAGLVL
R/W
8
0x0
U
Sag Voltage Level. An 8-bit write to this register determines at what peak
signal level on Channel 2 the SAG pin becomes active. The signal must
remain low for the number of cycles specified in the SAGCYC register
section.
0x20
IPKLVL
R/W
8
0xFF
U
Channel 1 Peak Level Threshold (Current Channel). This register sets the
level of current peak detection. If the Channel 1 input exceeds this level,
the PKI flag in the status register is set.
0x21
VPKLVL
R/W
8
0xFF
U
Channel 2 Peak Level Threshold (Voltage Channel). This register sets the
level of voltage peak detection. If the Channel 2 input exceeds this level,
the PKV flag in the status register is set.
0x22
IPEAK
R
24
0x0
U
Channel 1 Peak Register. The maximum input value of the current
channel, since the last read of the register is stored in this register.
0x23
RSTIPEAK
R
24
0x0
U
Same as Channel 1 peak register, except that the register contents are
reset to 0 after a read.
0x24
VPEAK
R
24
0x0
U
Channel 2 Peak Register. The maximum input value of the voltage
channel, since the last read of the register is stored in this register.
0x25
RSTVPEAK
R
24
0x0
U
Same as Channel 2 peak register, except that the register contents are
reset to 0 after a read.
Rev. C | Page 49 of 56
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADE7763ARSZ | 制造商:Analog Devices 功能描述:IC, SINGLE PHASE ENERGY METER, SSOP-20 |
| ADE7763ARSZRL | 功能描述:IC ENERGY METERING 1PHASE 20SSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 能量测量 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:* |
| ADE7763ARSZRL | 制造商:Analog Devices 功能描述:IC, SINGLE PHASE ENERGY METER, SSOP-20 |
| ADE7768 | 制造商:AD 制造商全称:Analog Devices 功能描述:Energy Metering IC with Integrated Oscillator and Positive Power Accumulation |
| ADE7768AR | 制造商:AD 制造商全称:Analog Devices 功能描述:Energy Metering IC with Integrated Oscillator and Positive Power Accumulation |
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