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参数资料
| 型号： | ADMC201 |
| 厂商： | Analog Devices, Inc. |
| 英文描述： | Motion Coprocessor(动作协处理器) |
| 中文描述： | 运动协处理器（动作协处理器） |
| 文件页数： | 8/16页 |
| 文件大小： | 193K |
| 代理商： | ADMC201 |
ADMC201
REV. A
–8–
VE CT OR T RANSFORMAT ION BLOCK OVE RVIE W
T he Vector T ransformation Block performs both Park and
Clarke coordinate transformations to control a three-phase
motor (Permanent Magnet Synchronous Motor or Induction
Motor) via independent control of the decoupled rotor torque
and flux currents. T he Park & Clarke transformations combine
to convert three-phase stator current signals into two orthogonal
rotor referenced current signals Id and Iq. Id represents the flux
or magnetic field current and Iq represents the torque generat-
ing current. T he Id and Iq current signals are used by the
processor’s motor torque control algorithm to calculate the re-
quired direct Vd and quadrature Vq voltage components for the
motor. T he forward Park and Clarke transformations are used
to convert the Vd and Vq voltage signals in the rotor reference
frame to three-phase voltage signals (U, V, W) in the stator ref-
erence frame. T hese are then scaled by the processor and writ-
ten to the ADMC201’s PWM registers in order to drive the
inverter. T he figures below illustrate the Clarke and Park
T ransformations respectively.
I
w
I
u
I
v
I
y
I
x
120
°
120
°
120
°
Three-Phase Equivalent
Stator Currents Two-Phase Currents
Figure 7. Reverse Clarke Transformation
I
y
I
x
ρ
I
q
I
d
ROTOR
REFERENCE
FRAME AXIS
90
°
Rotating Stationary
Reference Frame Reference Frame
Figure 8. Reverse Park Transformation
V
q
V
d
ρ
V
y
V
x
90
°
Stationary Rotating
Reference Frame Reference Frame
Figure 9. Forward Park Transformation
V
y
V
x
W
U
V
120
°
120
°
120
°
Equivalent Three-Phase Stator
Two-Phase Voltage Voltage
Figure 10. Forward Clarke Transformation
Operating/Using the Vector T ransformation Block
After powering up the ADMC201,
RESET
must be driven
low for a minimum of two clock cycles to enable vector
transformations.
T he vector transformation block can perform either a forward or
reverse transformation.
Reverse T ransformation is defined by the following operations:
(a) Clarke: 3-phase current signals to 2-phase current signals
followed by (b) Park: 2-phase current signals cross multiplied by
sin
ρ
, cos
ρ
which effectively measures the current components
with respect to the rotor (stationary) where
ρ
is the electrical
angle of the rotor field with respect to the stator windings.
Forward transformation is defined by the following operations:
(a) Park: 2-phase voltage signals cross multiplied by sin
ρ
, cos
ρ
fol-
lowed by (b) Clarke: 2-phase to 3-phase voltage signal conversion.
In order to provide maximum flexibility in the target system, the
ADMC201 operates in an asynchronous manner. T his means
that the functional blocks (analog input, reverse transformation,
forward transformation and PWM timers) operate indepen-
dently of each other. T he reverse and forward vector transfor-
mation operations cannot occur simultaneously. All vector
transformation registers, except for RHO/RHOP, are twos
complement. RHO/RHOP are unsigned ratios of 360
°
. For
example, 45
°
would be 45/360
×
2
12
.
Performing a Reverse T ransformation
A reverse transformation is initiated by writing to the reverse
rotation angle register RHO and operates on the values in the
PHIP1, PHIP2 and PHIP3 registers. When the reverse trans-
formation is in 2/3 mode, PHIP1 is calculated from PHIP2 and
PHIP3. T his is used in systems where only two-phase currents
are measured. T he reverse transformation 2/3 mode is set by
clearing Bit 10 in the SYSCT RL register and is the default
mode after
RESET
.
In order to perform a reverse transformation, first write to the
PHIP2 and PHIP3 registers, and to the PHIP1 register if not in
2/3 mode. T hen initiate the transformation by writing the re-
verse rotation angle to the RHO register.
T he reverse rotation will be completed in 37 system clock cycles
after the rotation is initiated. If Bit 6 of the system control reg-
ister is set, then an interrupt will be generated on completion.
When an interrupt occurs, the user must check Bit 1 of the
SYSST AT register to determine if the vector transformation
block was the source of the interrupt.
During the vector transformation, the vector transformation
registers must not be written to or the vector rotation results will
be invalid.
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