参数资料
型号: ADP1823ACPZ-R7
厂商: Analog Devices Inc
文件页数: 17/32页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 32LFCSP
标准包装: 1
PWM 型: 电压模式
输出数: 2
频率 - 最大: 720kHz
占空比: 90%
电源电压: 3.7 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 32-VFQFN 裸露焊盘,CSP
包装: 标准包装
产品目录页面: 791 (CN2011-ZH PDF)
其它名称: ADP1823ACPZ-R7DKR
ADP1823
In the case of output capacitors where the impedance of the
Furthermore, the high-side MOSFET transition loss is
V IN I L ( t R + t F ) f SW
Δ V OUT ?
Δ I L
ESR and ESL are small at the switching frequency, for instance,
where the output capacitor is a bank of parallel MLCC
capacitors, the capacitive impedance dominates and the ripple
equation reduces to
(7)
8 C OUT f SW
Make sure that the ripple current rating of the output capacitors
is greater than the maximum inductor ripple current.
During a load step transient on the output, the output capacitor
supplies the load until the control loop has a chance to ramp the
inductor current. This initial output voltage deviation due to a
approximated by
P T ?
2
where t R and t F are the rise and fall times of the selected
MOSFET as stated in the MOSFET data sheet.
The total power dissipation of the high-side MOSFET is
the sum of the previous losses.
P D = P C + P G + P T
where P D is the total high-side MOSFET power loss. This
dissipation heats the high-side MOSFET.
(10)
(11)
change in load is dependent on the output capacitor characteristics.
Again, usually the capacitor ESR dominates this response, and
the ΔV OUT in Equation 6 can be used with the load step current
value for ΔI L .
SELECTING THE MOSFETs
The choice of MOSFET directly affects the dc-to-dc converter
The conduction losses may need an adjustment to account
for the MOSFET R DSON variation with temperature. Note that
MOSFET R DSON increases with increasing temperature. The
MOSFET data sheet should list the thermal resistance of the
package, θ JA , along with a normalized curve of the temperature
coefficient of R DSON . For the power dissipation estimated,
calculate the MOSFET junction temperature rise over the
performance. The MOSFET must have low on resistance (R DSON )
to reduce I 2 R losses and low gate charge to reduce switching losses.
In addition, the MOSFET must have low thermal resistance to
ambient temperature of interest.
T J = T A + θ JA P D
(12)
ensure that the power dissipated in the MOSFET does not result
in overheating.
The power switch, or high-side MOSFET, carries the load current
during the PWM on time, carries the transition loss of the
switching behavior, and requires gate charge drive to switch.
Next, calculate the new R DSON from the temperature coefficient
curve and the R DSON specification at 25°C. A typical value of the
temperature coefficient (TC) of R DSON is 0.004/°C; therefore, an
alternate method to calculate the MOSFET R DSON at a second
temperature, T J , is
Typically, the smaller the MOSFET R DSON , the higher the gate
R DSON @ T J = R DSON @ 25°C[1 + TC ( T J ? 25°C)]
(13)
charge and vice versa. Therefore, it is important to choose a
high-side MOSFET that balances those two losses. The conduction
loss of the high-side MOSFET is determined by
Then the conduction losses can be recalculated and the procedure
iterated once or twice until the junction temperature calculations
are relatively consistent.
P C ? I L 2 R DSON
V OUT
V IN
(8)
The synchronous rectifier, or low-side MOSFET, carries the
inductor current when the high-side MOSFET is off. For high
where:
P C is the conduction power loss.
R DSON is the MOSFET on resistance.
The gate charge losses are dissipated by the ADP1823 regulator
and gate drivers and affect the efficiency of the system. The gate
charge loss is approximated by
input voltage and low output voltage, the low-side MOSFET
carries the current most of the time, and therefore, to achieve
high efficiency it is critical to optimize the low-side MOSFET
for small on resistance. In cases where the power loss exceeds
the MOSFET rating, or lower resistance is required than is
available in a single MOSFET, connect multiple low-side
MOSFETs in parallel. The equation for low-side MOSFET
P G ? V IN Q G f SW
(9)
power loss is
P LS ? I L 2 R DSON ? 1 ? OUT
?
?
?
where:
P G is the gate charge power.
Q G is the MOSFET total gate charge.
? V
? V IN
?
?
(14)
f SW is the converter switching frequency.
Making the conduction losses balance the gate charge losses
usually yields the most efficient choice.
where:
P LS is the low-side MOSFET on resistance.
R DSON is the parallel combination of the resistances of the low-
side MOSFETs.
Check the gate charge losses of the synchronous rectifier(s)
using the P G equation (Equation 9) to make sure they are
reasonable.
Rev. D | Page 17 of 32
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