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| 型号： | ADP1823ACPZ-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 23/32页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM VM 32LFCSP |
| 标准包装： | 1 |
| PWM 型： | 电压模式 |
| 输出数： | 2 |
| 频率 - 最大： | 720kHz |
| 占空比： | 90% |
| 电源电压： | 3.7 V ~ 20 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 32-VFQFN 裸露焊盘，CSP |
| 包装： | 标准包装 |
| 产品目录页面： | 791 (CN2011-ZH PDF) |
| 其它名称： | ADP1823ACPZ-R7DKR |
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ADP1823
For coincident tracking, use R TRKT = R TOP and R TRKB = R BOT ,
COINCIDENT TRACKING
The most common application is coincident tracking, used
in core vs. I/O voltage sequencing and similar applications.
Coincident tracking limits the slave output voltage to be the
same as the master voltage until it reaches regulation. Connect
the slave TRK input to a resistor divider from the master voltage
that is the same as the divider used on the slave FB pin. This
technique forces the slave voltage to be the same as the master
voltage.
B
where R TOP and R BOT are the values chosen in the Compensating
MASTER VOLTAGE
SLAVE VOLTAGE
For ratiometric tracking, the simplest configuration is to tie the
TRK pin of the slave channel to the FB pin of the master channel.
This has the advantage of having the fewest components, but
the accuracy suffers as the TRK pin voltage becomes equal to
the internal reference voltage and an offset is imposed on the
error amplifier of about ?18 mV at room temperature.
A more accurate solution is to provide a divider from the
master voltage that sets the TRK pin voltage to be something
lower than 0.6 V at regulation, for example, 0.5 V. The slave
channel can be viewed as having a 0.5 V external reference
supplied by the master voltage.
Once this is complete, the FB divider for the slave voltage is
Regulator section, except to substitute the 0.5 V reference for
the V FB voltage. The ratio of the slave output voltage to the
master voltage is a function of the two dividers:
? 1 +
= ?
? 1 +
?
?
?
?
TIME
Figure 31. Coincident Tracking
As the master voltage rises, the slave voltage rises identically.
Eventually, the slave voltage reaches its regulation voltage,
V OUT
V MASTER
?
?
?
?
R TOP
R BOT ?
R TRKT ? ?
R TRKB ? ?
(52)
where the internal reference takes over the regulation while the
TRK input continues to increase and thus removes itself from
influencing the output voltage. To ensure that the output voltage
accuracy is not compromised by the TRK pin being too close in
voltage to the 0.6 V reference, make sure that the final value of
the master voltage is greater than the slave regulation voltage by
at least 10%, or 60 mV as seen at the FB node. The higher the
final value, the better the performance is. A difference of 60 mV
between TRK and the 0.6 V reference produces about 3 mV of
offset in the error amplifier, or 0.5%, at room temperature, while
100 mV between them produces only 0.6 mV or 0.1% offset.
RATIOMETRIC TRACKING
Ratiometric tracking limits the slave output voltage to a fraction
of the master voltage. For example, the termination voltage for
DDR memories, VTT, is set to half the VDD voltage.
Another option is to add another tap to the divider for the
master voltage. Split the R BOT resistor of the master voltage into
two pieces, with the new tap at 0.5 V when the master voltage is
in regulation. This technique saves one resistor, but be aware
that Type III compensation on the master voltage causes the
feedforward signal of the master voltage to appear at the TRK
input of the slave channel.
By selecting the resistor values in the divider carefully, Equation 52
shows that the slave voltage output can be made to have a faster
ramp rate than that of the master voltage by setting the TRK
voltage at the slave larger than 0.6 V and R TRKB greater than
R TRKT . Make sure that the master SS period is long enough (that
is, sufficiently large SS capacitor) such that the input inrush
current does not run into the current limit of the power supply
during startup.
MASTER VOLTAGE
SLAVE VOLTAGE
TIME
Figure 32. Ratiometric Tracking
Rev. D | Page 23 of 32
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP1823-EVAL | 功能描述:BOARD EVAL FOR ADP1823 RoHS:否 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 标准包装:1 系列:- 主要目的:DC/DC，步降 输出及类型:1，非隔离 功率 - 输出:- 输出电压:3.3V 电流 - 输出:3A 输入电压:4.5 V ~ 28 V 稳压器拓扑结构:降压 频率 - 开关:250kHz 板类型:完全填充 已供物品:板 已用 IC / 零件:L7981 其它名称:497-12113STEVAL-ISA094V1-ND |
| ADP1828 | 制造商:AD 制造商全称:Analog Devices 功能描述:Synchronous Buck PWM, Step-Down, DC-to-DC Controller |
| ADP1828ACPZ-R7 | 功能描述:IC REG CTRLR BUCK PWM VM 20LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| ADP1828-BL1-EVZ | 制造商:Analog Devices 功能描述:BLANK ADISIMPOWER EVAL ADP1828 - Boxed Product (Development Kits) |
| ADP1828-BL2-EVZ | 制造商:Analog Devices 功能描述:BLANK ADISIMPOWER EVAL ADP1828 - Boxed Product (Development Kits) |
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