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参数资料
型号： ADSP-21478KBCZ-3A
厂商： Analog Devices Inc
文件页数： 75/76页
文件大小： 0K
描述： IC DSP SHARK 300MHZ 196CSPBGA
标准包装： 1
系列： SHARC®
类型： 浮点
接口： DAI，DPI，EBI/EMI，I²C，SPI，SPORT，UART/USART
时钟速率： 300MHz
非易失内存： ROM（4Mb）
芯片上RAM： 3Mb
电压 - 输入/输出： 3.30V
电压 - 核心： 1.30V
工作温度： 0°C ~ 70°C
安装类型： 表面贴装
封装/外壳： 196-LFBGA，CSPBGA
供应商设备封装： 196-CSPBGA（12x12）
包装： 托盘
Rev. C
|
Page 8 of 76
|
July 2013
ADSP-21477/ADSP-21478/ADSP-21479
On-Chip Memory Bandwidth
The internal memory architecture allows programs to have four
accesses at the same time to any of the four blocks (assuming
there are no block conflicts). The total bandwidth is realized
using the DMD and PMD buses (2 × 64-bit at CCLK speed) and
the IOD0/1 buses (2 × 32-bit at PCLK speed).
ROM Based Security
The processors have a ROM security feature that provides hard-
ware support for securing user software code by preventing
unauthorized reading from the internal code. When using this
feature, the processors do not boot-load any external code, exe-
cuting exclusively from internal ROM. Additionally, the
processor is not freely accessible via the JTAG port. Instead, a
unique 64-bit key, which must be scanned in through the JTAG
or Test Access Port, is assigned to each customer. The device
ignores an incorrect key. Emulation features are available after
the correct key is scanned.
Digital Transmission Content Protection
The DTCP specification defines a cryptographic protocol for
protecting audio entertainment content from illegal copying,
intercepting, and tampering as it traverses high performance
digital buses, such as the IEEE 1394 standard. Only legitimate
entertainment content delivered to a source device via another
approved copy protection system (such as the DVD content
scrambling system) is protected by this copy protection system.
For more information on this feature, contact your local ADI
sales office.
FAMILY PERIPHERAL ARCHITECTURE
The ADSP-2147x family contains a rich set of peripherals that
support a wide variety of applications including high quality
audio, medical imaging, communications, military, test equip-
ment, 3D graphics, speech recognition, motor control, imaging,
and other applications.
Table 5. ADSP-21479 Internal Memory Space (5M bits)1
IOP Registers 0x0000 0000–0x0003 FFFF
Long Word (64 Bits)
Extended Precision Normal or
Instruction Word (48 Bits)
Normal Word (32 Bits)
Short Word (16 Bits)
Block 0 ROM (Reserved)
0x0004 0000–0x0004 7FFF
Block 0 ROM (Reserved)
0x0008 0000–0x0008 AAA9
Block 0 ROM (Reserved)
0x0008 0000–0x0008 FFFF
Block 0 ROM (Reserved)
0x0010 0000–0x0011 FFFF
Reserved
0x0004 8000–0x0004 8FFF
Reserved
0x0008 AAAA–0x0008 BFFF
Reserved
0x0009 0000–0x0009 1FFF
Reserved
0x0012 0000–0x0012 3FFF
Block 0 SRAM
0x0004 9000–0x0004 EFFF
Block 0 SRAM
0x0008 C000–0x0009 3FFF
Block 0 SRAM
0x0009 2000–0x0009 DFFF
Block 0 SRAM
0x0012 4000–0x0013 BFFF
Reserved
0x0004 F000–0x0004 FFFF
Reserved
0x0009 4000–0x0009 FFFF
Reserved
0x0009 E000–0x0009 FFFF
Reserved
0x0013 C000–0x0013 FFFF
Block 1 ROM (Reserved)
0x0005 0000–0x0005 7FFF
Block 1 ROM (Reserved)
0x000A 0000–0x000A AAA9
Block 1 ROM (Reserved)
0x000A 0000–0x000AFFFF
Block 1 ROM (Reserved)
0x0014 0000–0x0015 FFFF
Reserved
0x0005 8000–0x0005 8FFF
Reserved
0x000A AAAA–0x000A BFFF
Reserved
0x000B 0000–0x000B 1FFF
Reserved
0x0016 0000–0x0016 3FFF
Block 1 SRAM
0x0005 9000–0x0005 EFFF
Block 1 SRAM
0x000A C000–0x000B 3FFF
Block 1 SRAM
0x000B 2000–0x000B DFFF
Block 1 SRAM
0x0016 4000–0x0017 BFFF
Reserved
0x0005 F000–0x0005 FFFF
Reserved
0x000B 4000–0x000B FFFF
Reserved
0x000B E000–0x000B FFFF
Reserved
0x0017 C000–0x0017 FFFF
Block 2 SRAM
0x0006 0000–0x0006 3FFF
Block 2 SRAM
0x000C 0000–0x000C 5554
Block 2 SRAM
0x000C 0000–0x000C 7FFF
Block 2 SRAM
0x0018 0000–0x0018 FFFF
Reserved
0x0006 4000– 0x0006 FFFF
Reserved
0x000C 5555–0x0000D FFFF
Reserved
0x000C 8000–0x000D FFFF
Reserved
0x0019 0000–0x001B FFFF
Block 3 SRAM
0x0007 0000–0x0007 3FFF
Block 3 SRAM
0x000E 0000–0x000E 5554
Block 3 SRAM
0x000E 0000–0x000E 7FFF
Block 3 SRAM
0x001C 0000–0x001C FFFF
Reserved
0x0007 4000–0x0007 FFFF
Reserved
0x000E 5555–0x0000F FFFF
Reserved
0x000E 8000–0x000F FFFF
Reserved
0x001D 0000–0x001F FFFF
1 Some processors include a customer-definable ROM block. ROM addresses on these models are not reserved as shown in this table. Please contact your Analog Devices sales
representative for additional details.
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