参数资料
型号: ADSP-BF537BBC-5A
厂商: Analog Devices Inc
文件页数: 58/68页
文件大小: 0K
描述: IC DSP CTLR 16BIT 182CSPBGA
产品培训模块: Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
标准包装: 1
系列: Blackfin®
类型: 定点
接口: CAN,SPI,SSP,TWI,UART
时钟速率: 500MHz
非易失内存: 外部
芯片上RAM: 132kB
电压 - 输入/输出: 2.50V,3.30V
电压 - 核心: 1.26V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 182-LFBGA,CSPBGA
供应商设备封装: 182-CSPBGA(12x12)
包装: 托盘
配用: ADZS-BF537-ASKIT-ND - BOARD EVAL SKIT ADSP-BF537
ADZS-BFAUDIO-EZEXT-ND - BOARD EVAL AUDIO BLACKFIN
ADZS-BF537-EZLITE-ND - BOARD EVAL ADSP-BF537
ADZS-BFAV-EZEXT-ND - BOARD DAUGHT ADSP-BF533,37,61KIT
ADZS-BF537-STAMP-ND - SYSTEM DEV FOR ADSP-BF537
Rev. J
|
Page 61 of 68
|
February 2014
Table 52 lists the CSP_BGA ball assignment by ball number.
Table 51 on Page 60 lists the CSP_BGA ball assignment by sig-
nal mnemonic.
Table 52. 208-Ball CSP_BGA Ball Assignment (Numerically by Ball Number)
Ball No.
Mnemonic
Ball No.
Mnemonic
Ball No.
Mnemonic
Ball No.
Mnemonic
Ball No.
Mnemonic
A1
GND
C19
PJ11
J9
GND
M19
AMS1
W1
TCK
A2
PG12
C20
NMI
J10
GND
M20
AMS0
W2
GND
A3
PG13
D1
PG7
J11
GND
N1
PF5
W3
DATA15
A4
PG15
D2
PG8
J12
GND
N2
PF6
W4
DATA13
A5
PH1
D19
PJ2
J13
GND
N7
VDDEXT
W5
DATA11
A6
PH3
D20
RESET
J14
VDDINT
N8
VDDEXT
W6
DATA9
A7
PH5
E1
PG5
J19
ARDY
N9
GND
W7
DATA7
A8
PH7
E2
PG6
J20
SMS
N10
GND
W8
DATA5
A9
PH9
E19
PJ3
K1
PF11
N11
GND
W9
DATA3
A10
PH11
E20
VROUT0
K2
PF12
N12
GND
W10
DATA1
A11
PH13
F1
PG3
K7
VDDEXT
N13
GND
W11
BMODE2
A12
PH15
F2
PG4
K8
VDDEXT
N14
VDDINT
W12
BMODE1
A13
GND
F19
BR
K9
GND
N19
ARE
W13
BMODE0
A14
RTXI
F20
VROUT1
K10
GND
N20
AOE
W14
ADDR18
A15
RTXO
G1
PG1
K11
GND
P1
PF3
W15
ADDR16
A16
VDDRTC
G2
PG2
K12
GND
P2
PF4
W16
ADDR14
A17
XTAL
G7
VDDEXT
K13
GND
P7
VDDEXT
W17
ADDR12
A18
CLKIN
G8
VDDEXT
K14
VDDINT
P8
VDDEXT
W18
ADDR10
A19
PJ5
G9
VDDEXT
K19
SRAS
P9
VDDEXT
W19
GND
A20
GND
G10
VDDEXT
K20
SCAS
P10
VDDEXT
W20
ADDR8
B1
PG11
G11
GND
L1
PF9
P11
GND
Y1
GND
B2
GND
G12
VDDINT
L2
PF10
P12
VDDINT
Y2
TDO
B3
PG14
G13
VDDINT
L7
VDDEXT
P13
VDDINT
Y3
DATA14
B4
PH0
G14
VDDINT
L8
VDDEXT
P14
VDDINT
Y4
DATA12
B5
PH2
G19
AMS3
L9
GND
P19
ABE0
Y5
DATA10
B6
PH4
G20
AMS2
L10
GND
P20
ABE1
Y6
DATA8
B7
PH6
H1
PF15
L11
GND
R1
PF1
Y7
DATA6
B8
PH8
H2
PG0
L12
GND
R2
PF2
Y8
DATA4
B9
PH10
H7
VDDEXT
L13
GND
R19
ADDR1
Y9
DATA2
B10
PH12
H8
VDDEXT
L14
VDDINT
R20
AWE
Y10
DATA0
B11
PH14
H9
GND
L19
SWE
T1
EMU
Y11
BG
B12
PJ0
H10
GND
L20
SA10
T2
PF0
Y12
BGH
B13
PJ1
H11
GND
M1
PF7
T19
ADDR3
Y13
GND
B14
CLKBUF
H12
GND
M2
PF8
T20
ADDR2
Y14
ADDR19
B15
PJ6
H13
GND
M7
VDDEXT
U1
TRST
Y15
ADDR17
B16
PJ7
H14
VDDINT
M8
VDDEXT
U2
TMS
Y16
ADDR15
B17
PJ8
H19
CLKOUT
M9
GND
U19
ADDR5
Y17
ADDR13
B18
PJ4
H20
SCKE
M10
GND
U20
ADDR4
Y18
ADDR11
B19PJ10
J1
PF13
M11
GND
V1
TDI
Y19ADDR9
B20
PJ9
J2
PF14
M12
GND
V2
GND
Y20
GND
C1
PG9
J7
VDDEXT
M13
GND
V19
ADDR7
C2
PG10
J8
VDDEXT
M14
VDDINT
V20
ADDR6
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