参数资料
型号: ADSP-TS201SABP-060
厂商: Analog Devices Inc
文件页数: 9/48页
文件大小: 0K
描述: IC PROCESSOR 600MHZ 576BGA
标准包装: 1
系列: TigerSHARC®
类型: 定点/浮点
接口: 主机接口,连接端口,多处理器
时钟速率: 600MHz
非易失内存: 外部
芯片上RAM: 3MB
电压 - 输入/输出: 2.50V
电压 - 核心: 1.20V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 576-BBGA 裸露焊盘
供应商设备封装: 576-BGA-ED(25x25)
包装: 托盘
配用: ADZS-TS201S-EZLITE-ND - KIT LITE EVAL FOR ADSP-TS201S
ADSP-TS201S
Rev. C
|
Page 17 of 48
|
December 2006
Table 9. Pin Definitions—JTAG Port
Signal
Type
Term
Description
EMU
O/OD
nc
1
Emulation. Connected to the DSP’s JTAG emulator target board connector only.
TCK
I
epd or epu
Test Clock (JTAG). Provides an asynchronous clock for JTAG scan.
TDI
I (pu_ad)
nc1
Test Data Input (JTAG). A serial data input of the scan path.
TDO
O/T
nc1
Test Data Output (JTAG). A serial data output of the scan path.
TMS
I (pu_ad)
nc1
Test Mode Select (JTAG). Used to control the test state machine.
TRST
I/A (pu_ad)
na
Test Reset (JTAG). Resets the test state machine. TRST must be asserted or pulsed low
after power up for proper device operation. For more information, see Reset and
I = input; A = asynchronous; O = output; OD = open-drain output; T = three-state; P = power supply; G = ground; pd = internal pull-down
5k
Ω; pu = internal pull-up 5 kΩ; pd_0 = internal pull-down 5 kΩ on DSP ID = 0; pu_0 = internal pull-up 5 kΩ on DSP ID = 0; pu_od_0 = internal
pull-up 500
Ω on DSP ID = 0; pd_m = internal pull-down 5 kΩ on DSP bus master; pu_m = internal pull-up 5 kΩ on DSP bus master; pu_ad
= internal pull-up 40 k
Ω. For more pull-down and pull-up information, see Electrical Characteristics on Page 22.
Term (termination of unused pins) column symbols: epd = external pull-down approximately 5 k
Ω to VSS; epu = external pull-up approx-
imately 5 k
Ω to VDD_IO, nc = not connected; na = not applicable (always used); VDD_IO = connect directly to VDD_IO; VSS = connect directly to VSS
1 See the reference on Page 11 to the JTAG emulation technical reference EE-68.
Table 10. Pin Definitions—Flags, Interrupts, and Timer
Signal
Type
Term
Description
FLAG3–0
I/O/A
(pu)
nc
FLAG pins. Bidirectional input/output pins can be used as program conditions. Each pin
can be configured individually for input or for output. FLAG3–0 are inputs after power-up
and reset.
IRQ3–0
I/A
(pu)
nc
Interrupt Request. When asserted, the DSP generates an interrupt. Each of the IRQ3–0 pins
can be independently set for edge-triggered or level-sensitive operation. After reset, these
pins are disabled unless the IRQ3–0 strap option and interrupt vectors are initialized for
booting.
TMR0E
O
na
Timer 0 expires. This output pulses whenever timer 0 expires. At reset, this is a strap pin.
For more information, see Table 16 on Page 20.
I = input; A = asynchronous; O = output; OD = open-drain output; T = three-state; P = power supply; G = ground; pd = internal pull-down
5k
Ω; pu = internal pull-up 5 kΩ; pd_0 = internal pull-down 5 kΩ on DSP ID = 0; pu_0 = internal pull-up 5 kΩ on DSP ID = 0; pu_od_0 = internal
pull-up 500
Ω on DSP ID = 0; pd_m = internal pull-down 5 kΩ on DSP bus master; pu_m = internal pull-up 5 kΩ on DSP bus master; pu_ad
= internal pull-up 40 k
Ω. For more pull-down and pull-up information, see Electrical Characteristics on Page 22.
Term (termination of unused pins) column symbols: epd = external pull-down approximately 5 k
Ω to VSS; epu = external pull-up approx-
imately 5 k
Ω to VDD_IO, nc = not connected; na = not applicable (always used); VDD_IO = connect directly to VDD_IO; VSS = connect directly to VSS
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ADSP-TS201SABPZ050 功能描述:IC PROCESSOR 500MHZ 576BGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP(数字式信号处理器) 系列:TigerSHARC® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI,以太网,RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA,FCBGA 供应商设备封装:431-FCPBGA(20x20) 包装:托盘