参数资料
型号: ADUC812BSZ
厂商: Analog Devices Inc
文件页数: 16/57页
文件大小: 0K
描述: IC ADC 12BIT MULTICH MCU 52-MQFP
产品培训模块: Process Control
标准包装: 1
系列: MicroConverter® ADuC8xx
核心处理器: 8052
芯体尺寸: 8-位
速度: 16MHz
连通性: I²C,SPI,UART/USART
外围设备: PSM,温度传感器,WDT
输入/输出数: 34
程序存储器容量: 8KB(8K x 8)
程序存储器类型: 闪存
EEPROM 大小: 640 x 8
RAM 容量: 256 x 8
电压 - 电源 (Vcc/Vdd): 2.7 V ~ 5.5 V
数据转换器: A/D 8x12b,D/A 2x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 52-QFP
包装: 托盘
产品目录页面: 738 (CN2011-ZH PDF)
REV.
ADuC812
–23–
SOURCE/SINK CURRENT – mA
3
05
10
15
OUTPUT
VOLTAGE
V
2
1
0
Figure 21. Source and Sink Current Capability with
VREF = VDD = 3 V
To drive significant loads with the DAC outputs, external
buffering may be required, as illustrated in Figure 22.
9
ADuC812
10
Figure 22. Buffering the DAC Outputs
The DAC output buffer also features a high impedance disable
function. In the chip’s default power-on state, both DACs are
disabled, and their outputs are in a high impedance state (or
“three-state”) where they remain inactive until enabled in software.
This means that if a zero output is desired during power-up or
power-down transient conditions, then a pull-down resistor must
be added to each DAC output. Assuming this resistor is in place,
the DAC outputs will remain at ground potential whenever the
DAC is disabled. However, each DAC output will still spike
briefly when power is first applied to the chip, and again when
each DAC is first enabled in software. Typical scope shots of
these spikes are given in Figure 23 and Figure 24, respectively.
200 s/DIV
AVDD – 2V/DIV
DAC OUT – 500mV/DIV
Figure 23. DAC Output Spike at Chip Power-Up
s/DIV, 1V/DIV
5
Figure 24. DAC Output Spike at DAC Enable
F
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