参数资料
型号: ADV7180WBCPZ
厂商: Analog Devices Inc
文件页数: 79/116页
文件大小: 0K
描述: IC VIDEO DECODER SDTV 40LFCSP
标准包装: 1
类型: 视频解码器
应用: 数码相机,手机,便携式视频
安装类型: 表面贴装
封装/外壳: 40-VFQFN 裸露焊盘,CSP
供应商设备封装: 40-LFCSP-VQ(6x6)
包装: 托盘
Data Sheet
ADV7180
Rev. I | Page 65 of 116
CCAP
Two bytes of decoded closed caption data are available in the
I2C registers. The field information of the decoded CCAP data
can be obtained from the CC_EVEN_FIELD bit (Register 0x78).
CC_CLEAR, Closed Caption Clear, Address 0x78[0],
User Sub Map, Write Only, Self-Clearing
Setting CC_CLEAR to 1 reinitializes the CCAP readback
registers.
CC_AVL, Closed Caption Available, Address 0x78[0],
User Sub Map, Read Only
When CC_AVL is 0, closed captioning is not detected.
When CC_AVL is 1, closed captioning is detected.
CC_EVEN_FIELD, Address 0x78[1], User Sub Map,
Read Only
Identifies the field from which the CCAP data is decoded.
When CC_EVEN_FIELD is 0, closed captioning is detected
from an odd field.
When CC_EVEN_FIELD is 1, closed captioning is detected
from an even field.
VDP_CCAP_DATA_0, Address 0x79[7:0], User Sub Map,
Read Only
Decoded Byte 1 of CCAP data.
VDP_CCAP_DATA_1, Address 0x7A[7:0], User Sub Map,
Read Only
Decoded Byte 2 of CCAP data.
0
REFERENCE COLOR BURST
(9 CYCLES)
FREQUENCY = fSC = 3.579545MHz
AMPLITUDE = 40 IRE
1
7 CYCLES
OF 0.5035MHz
(CLOCK RUN-IN)
2 3 4 5 6 7 0 1 2 3 4 5 6 7
P
A
R
I
T
Y
S
T
A
R
T
P
A
R
I
T
Y
VDP_CCAP_D ATA_0
33.764s
10.003s
10.5 ± 0.25s
12.91s
27.382s
50 IRE
40 IRE
05700-
041
VDP_CCAP_D ATA_1
Figure 50. CCAP Waveform and Decoded Data Correlation
Table 82. CCAP Readback Registers1
Signal Name
Register Location
Address (User Sub Map)
CCAP_BYTE_1[7:0]
VDP_CCAP_DATA_0[7:0]
121
0x79
CCAP_BYTE_2[7:0]
VDP_CCAP_DATA_1[7:0]
122
0x7A
1
These registers are readback registers; default value does not apply.
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