参数资料
型号: AT32UC3L032-D3HT
厂商: Atmel
文件页数: 90/174页
文件大小: 0K
描述: MCU AVR32 32K FLASH 48TTLGA
产品培训模块: AVR® UC3 Introduction
标准包装: 2,450
系列: AVR®32 UC3 L
核心处理器: AVR
芯体尺寸: 32-位
速度: 50MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,DMA,POR,PWM,WDT
输入/输出数: 36
程序存储器容量: 32KB(32K x 8)
程序存储器类型: 闪存
RAM 容量: 16K x 8
电压 - 电源 (Vcc/Vdd): 1.62 V ~ 3.6 V
数据转换器: A/D 9x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 48-UFLGA
包装: 托盘
41
32099I–01/2012
AT32UC3L016/32/64
7.
Peripheral DMA Controller (PDCA)
Rev: 1.2.2.1
7.1
Features
Multiple channels
Generates transfers between memories and peripherals such as USART and SPI
Two address pointers/counters per channel allowing double buffering
Performance monitors to measure average and maximum transfer latency
Optional synchronizing of data transfers with extenal peripheral events
Ring buffer functionality
7.2
Overview
The Peripheral DMA Controller (PDCA) transfers data between on-chip peripheral modules such
as USART, SPI and memories (those memories may be on- and off-chip memories). Using the
PDCA avoids CPU intervention for data transfers, improving the performance of the microcon-
troller. The PDCA can transfer data from memory to a peripheral or from a peripheral to memory.
The PDCA consists of multiple DMA channels. Each channel has:
A Peripheral Select Register
A 32-bit memory pointer
A 16-bit transfer counter
A 32-bit memory pointer reload value
A 16-bit transfer counter reload value
The PDCA communicates with the peripheral modules over a set of handshake interfaces. The
peripheral signals the PDCA when it is ready to receive or transmit data. The PDCA acknowl-
edges the request when the transmission has started.
When a transmit buffer is empty or a receive buffer is full, an optional interrupt request can be
generated.
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