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参数资料
| 型号： | AT85C51SND3B1-7FTUL |
| 厂商： | Atmel |
| 文件页数： | 34/119页 |
| 文件大小： | 0K |
| 描述： | IC DECODER/ENCODER DGTL 100CBGA |
| 标准包装： | 90 |
| 类型： | 音频编码器/解码器 |
| 应用： | 移动电话，手机，视频显示器 |
| 电压 - 电源，数字： | 1.65 V ~ 3.6 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-TFBGA |
| 供应商设备封装： | 100-CTBGA（9x9） |
| 包装： | 托盘 |
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21
AT85C51SND3B
7632D–MP3–01/07
Battery Voltage Monitor
The battery voltage monitor is a 5-bit / 50 mV resolution A to D converter with fixed con-
version range as detailed in Table 18.
Table 18. Battery Voltage Value
Conversion Management
The battery voltage monitor is turned on by setting the VBPEN and VBCEN bits in
PCON (see Table 20). VBPEN bit is set first and VBCEN bit is set 1 ms later. An addi-
tional delay of 16 cycles is required before lauching any conversion.
Launching a conversion is done by setting VBEN bit in VBAT (see Table 22). VBEN is
automatically cleared at the end of the conversion which takes 34 clock periods. At this
step two cases occur:
Voltage is valid (inside conversion range)
VBERR is cleared and conversion value is set in VB4:0 according to Table 18.
Voltage is invalid (out of conversion range)
VBERR is set and value reported by VB4:0 is indeterminate.
Power Reduction Mode
Two power reduction modes are implemented in the AT85C51SND3B: the Idle mode
and the Power-down mode. These modes are detailed in the following sections. In addi-
tion to these power reduction modes, the clocks of the core and peripherals can be
dynamically divided by 2 using the X2 mode as detailed in Section “X2 Feature”,
page 31.
Lock Mode
In order to allow firmware to efficiently enter in idle mode and not to lose any events that
should come from one or more interrupts, power reduction modes entry are conditioned
to an hardware bit: PMLCK in PCON.
PMLCK is set by software in each ISR that needs to report an event to the system and
thus disables entry in power reduction mode and allows immediate processing of this
event. It is cleared by software after exiting power reduction mode.
As shown in Figure 9, when power reduction modes are disabled by setting PMLCK, IDL
and PD bits in PCON can not be set and idle or power down modes are not entered.
Figure 9. Power Reduction Controller Block Diagram
VB4:0
Battery Voltage (V)
00000
[0.9 - 0.95[
00001
[0.95 - 1.0[
00010
[1.0 - 1.05[
…
01110
[1.6 - 1.65[
01111
[1.65 - 1.7[
10000
[1.7 - 1.75[
System Idle
System Power Down
IDL
PCON.0
PD
PCON.1
PMLCK
PCON.2
Write to IDL
Write to PD
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AT85C51SND3B1N-DDV | 功能描述:音频 DSP Microcontroller RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| AT85C51SND3B1N-RTTUL | 功能描述:音频 DSP Microcontroller RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| AT85C51SND3B1-RTTUL | 功能描述:音频 DSP MP3/WMA USB2.0 w/o DAC+DC/DC RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| AT85C51SND3B2-RTTUL | 功能描述:音频 DSP Microcontroller RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| AT85C51SND3BX | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:MP3 Microcontrollers |
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