参数资料
型号: AT85C51SND3B1-7FTUL
厂商: Atmel
文件页数: 66/119页
文件大小: 0K
描述: IC DECODER/ENCODER DGTL 100CBGA
标准包装: 90
类型: 音频编码器/解码器
应用: 移动电话,手机,视频显示器
电压 - 电源,数字: 1.65 V ~ 3.6 V
安装类型: 表面贴装
封装/外壳: 100-TFBGA
供应商设备封装: 100-CTBGA(9x9)
包装: 托盘
50
AT85C51SND3B
7632D–MP3–01/07
Memory Space
The AT85C51SND3B derivatives implement an “all in one” 64K bytes of RAM split
between the three standard C51 memory segments:
CODE
DATA
XDATA
To satisfy application needs in term of CODE and XDATA sizes, size and base address
of XDATA and CODE segments and base address of DATA segment can be dynami-
cally configured.
Figure 25 shows the memory space organization.
Figure 25. Memory Organization
Memory Segments
CODE Segment
The AT85C51SND3B executes up to 64K Bytes of program/code memory.
The AT85C51SND3B implements an additional 4K Bytes of on-chip boot ROM memory.
This boot memory is delivered programmed with a boot strap software allowing loading
of the application code from the Nand Flash Memory to the internal RAM. It also con-
tains a boot loader software allowing In-System Programming (ISP).
DATA Segment
The DATA segment is mapped in two separate segments:
The lower 128 Bytes RAM segment
The upper 128 Bytes RAM segment
Lower 128 Bytes
The lower 128 Bytes of RAM (see Figure 26) are accessible from address 00h to 7Fh
using direct or indirect addressing modes. The lowest 32 Bytes are grouped into 4
banks of 8 registers (R0 to R7). 2 bits RS0 and RS1 in PSW register (see Table 64)
select which bank is in use according to Table 63. This allows more efficient use of code
space, since register instructions are shorter than instructions that use direct address-
ing, and can be used for context switching in interrupt service routines.
8K Bytes
Secured Boot ROM
11FFFh
10000h
0000h
64K Bytes RAM
-
FFFFh
CODE
DATA
XDATA
M
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m
o
ry
C
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tr
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r
DFC
Bus
CPU
Bus
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AT85C51SND3B2-RTTUL 功能描述:音频 DSP Microcontroller RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube
AT85C51SND3BX 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:MP3 Microcontrollers