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参数资料
| 型号： | AT85C51SND3B1-7FTUL |
| 厂商： | Atmel |
| 文件页数： | 36/119页 |
| 文件大小： | 0K |
| 描述： | IC DECODER/ENCODER DGTL 100CBGA |
| 标准包装： | 90 |
| 类型： | 音频编码器/解码器 |
| 应用： | 移动电话，手机，视频显示器 |
| 电压 - 电源，数字： | 1.65 V ~ 3.6 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 100-TFBGA |
| 供应商设备封装： | 100-CTBGA（9x9） |
| 包装： | 托盘 |
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23
AT85C51SND3B
7632D–MP3–01/07
the clocks to the CPU and peripherals. Using INTn input, execution resumes
when the input is released (see Figure 10) while using KINx input, execution
resumes after counting 1024 clock ensuring the oscillator is restarted properly
(see Figure 11). This behavior is necessary for decoding the key while it is still
pressed. In both cases, execution resumes with the interrupt service routine.
Upon completion of the interrupt service routine, program execution resumes
with the instruction immediately following the instruction that activated Power-
down mode.
Note:
1. The external interrupt used to exit Power-down mode must be configured as level
sensitive (
INT0 and INT1) and must be assigned the highest priority. In addition, the
duration of the interrupt must be long enough to allow the oscillator to stabilize. The
execution will only resume when the interrupt is de-asserted.
2. Exit from power-down by external interrupt does not affect the SFRs nor the internal
RAM content.
Figure 10. Power-down Exit Waveform Using INT1:0
Figure 11. Power-down Exit Waveform Using KIN3:0
Note:
1. KIN3:0 can be high or low-level triggered.
2.
Generate a reset.
–
A logic high on the RST pin clears PD bit in PCON register directly and
asynchronously. This starts the oscillator and restores the clock to the CPU and
peripherals. Program execution momentarily resumes with the instruction
immediately following the instruction that activated Power-down mode and may
continue for a number of clock cycles before the internal reset algorithm takes
control. Reset initializes the AT85C51SND3B and vectors the CPU to address
0000h.
Notes:
1. During the time that execution resumes, the internal RAM cannot be accessed; how-
ever, it is possible for the Port pins to be accessed. To avoid unexpected outputs at
the Port pins, the instruction immediately following the instruction that activated the
Power-down mode should not write to a Port pin or to the external RAM.
2. Exit from power-down by reset redefines all the SFRs, but does not affect the internal
RAM content.
INT1:0
OSC
Power-down Phase
Oscillator Restart Phase
Active Phase
KIN3:0(1)
OSC
Power-down Phase
42000 clock count
Active Phase
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AT85C51SND3B1N-DDV | 功能描述:音频 DSP Microcontroller RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| AT85C51SND3B1N-RTTUL | 功能描述:音频 DSP Microcontroller RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| AT85C51SND3B1-RTTUL | 功能描述:音频 DSP MP3/WMA USB2.0 w/o DAC+DC/DC RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| AT85C51SND3B2-RTTUL | 功能描述:音频 DSP Microcontroller RoHS:否 制造商:Texas Instruments 工作电源电压: 电源电流: 工作温度范围: 安装风格: 封装 / 箱体: 封装:Tube |
| AT85C51SND3BX | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:MP3 Microcontrollers |
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